On Mon, Jul 16, 2018 at 5:54 PM, Rhys Perry <pendingchao...@gmail.com> wrote:
> The instructions should probably be marked as fixed so they aren't CSE'd.
>
mhh, but then also prevents us from doing DCE :/ I guess we can depend
on nir eliminating such high level instructions, but with TGSI we also
mark that as fixed, so I guess I just go ahead and change that. Thanks
for pointing that out.
> On Fri, Jun 29, 2018 at 11:32 PM, Karol Herbst <kher...@redhat.com> wrote:
>> Signed-off-by: Karol Herbst <kher...@redhat.com>
>> ---
>> src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp | 8 ++++++++
>> 1 file changed, 8 insertions(+)
>>
>> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
>> b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
>> index f4875113d00..ed2453136fd 100644
>> --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
>> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
>> @@ -2344,6 +2344,14 @@ Converter::visit(nir_intrinsic_instr *insn)
>> bar->subOp = getSubOp(op);
>> break;
>> }
>> + case nir_intrinsic_shader_clock: {
>> + const DataType dType = getDType(insn);
>> + LValues &newDefs = convert(&insn->dest);
>> +
>> + loadImm(newDefs[0], 0u);
>> + mkOp1v(OP_RDSV, dType, newDefs[1], mkSysVal(SV_CLOCK, 0));
>> + break;
>> + }
>> default:
>> ERROR("unknown nir_intrinsic_op %s\n", nir_intrinsic_infos[op].name);
>> return false;
>> --
>> 2.17.1
>>
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