This series deal with the main performance issue in shader compilation performance when 8/16-bit types are used.
This series avoid extending the liveness range of variables that use a partial register. We track in the liveness analysis which bytes of the register are defined and not used before its definition inside each block. This helps to remove almost all the spilling generated spuriously because of the overextended liveness range. This increased register pressure unnecessary. We improving 8bit_storage VK-CTS tests executions time 25x faster removing almost all the spilling in the tests. The sames applys to 16bit_storage tests. At the same time we have some nice improvements in shader-db without impact in the execution time. See patch[2/2] for details. In a follow up I would like to extend this approach to intra-block to livein/liveout calculation but I've haven't found yet a case where I see any improvements in the generated code and I have still pending to deal with an important increase in compilation time in my WIP solution. Jose Maria Casanova Crespo (2): intel/fs: New method for register_byte_use_pattern for fs_inst intel/fs: Improve liveness range calculation for partial writes src/intel/compiler/brw_fs.cpp | 183 +++++++++++++++++++ src/intel/compiler/brw_fs_live_variables.cpp | 32 +++- src/intel/compiler/brw_fs_live_variables.h | 9 + src/intel/compiler/brw_ir_fs.h | 1 + 4 files changed, 217 insertions(+), 8 deletions(-) Cc: Francisco Jerez <curroje...@riseup.net> Cc: Jason Ekstrand <ja...@jlekstrand.net> -- 2.17.1 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
