Bas, I think patches 4&5 can already be merged?
I will investigate about the CTS regressions, probably this week.
On 07/04/2018 03:06 PM, Samuel Pitoiset wrote:
In case we failed to submit the CS correctly.
Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
---
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
index e54d9e84fb..f20b9ff6d8 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -1134,10 +1134,11 @@ static int radv_amdgpu_winsys_cs_submit_sysmem(struct
radeon_winsys_ctx *_ctx,
for (unsigned j = 0; j < number_of_ibs; j++) {
ws->buffer_destroy(bos[j]);
- if (r)
- return r;
}
+ if (r)
+ return r;
+
i += cnt;
}
if (fence)
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