---
src/mesa/drivers/dri/i965/genX_state_upload.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index b279f01e1a1..921b420ab81 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -1935,7 +1935,7 @@ genX(upload_wm)(struct brw_context *brw)
brw_wm_prog_data_dispatch_grf_start_reg(wm_prog_data, wm, 2));
}
#elif GEN_GEN == 6
- /* On gen5, we have multiple shader kernels and we no longer specify a
+ /* On gen6, we have multiple shader kernels and we no longer specify a
* register count for each one.
*/
wm.KernelStartPointer0 = stage_state->prog_offset +
--
2.18.0
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