Rob Clark <robdcl...@gmail.com> writes: > On Thu, Jun 28, 2018 at 12:46 AM, Ian Romanick <i...@freedesktop.org> wrote: >> From: Ian Romanick <ian.d.roman...@intel.com> >> >> That flow control may be trying to avoid invalid loads. On at least >> some platforms, those loads can also be expensive. > > So for adreno, indirect uniform loads aren't really that expensive (it > takes a few cycles to get the value from an alu instruction into the > address register for indirect register addressing but that latency can > usually be hidden).. and invalid access won't cause a fault or > anything. I think it just wraps around, so it will be some undefined > value but won't cause a fault. > > This is completely different from UBO's were we could cause a fault, > and loads are real memory access, so more expensive. > > So as long as this is just about uniforms (I think i965 calls them > 'push constants'?), and not UBOs, then maybe we want > nir_shader_compiler_options flag?
For VC4, I have to clamp the indirect load addresses anyway, so I don't need this (though avoiding a load is probably worth it anyway!). For V3D I'm not clamping, so it would also want this I think.
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