On Monday, June 11, 2018 7:25:52 PM PDT Francisco Jerez wrote: > This series contains a few code generation refactors and clean-ups > that are starting to pile up in an internal branch. By itself this > series shouldn't cause any functional changes, but there's no reason > why it couldn't be reviewed already which would lessen our pain > keeping the branch up-to-date. > > Patches 1-16 rework the mechanism used in most of the back-end code > generator to construct message descriptors in-place as part of the > immediate of either a SEND(C) instruction or some other ALU > instruction, which won't work as soon as we introduce support for the > SENDS instruction and has proven to be rather fragile (see > d2eecf0b0b24d203d0f171807681dffd830d54de), among other disadvantages. > > Patches 18-22 drop the hard-coded correspondence between i965 IR > opcodes and native hardware opcodes, which can fail horribly if the > back-end compiler ever needs to use more than one of the hardware > instructions with the same opcode (simultaneously or not), or if the > opcode of any instruction is reassigned. Fixing this involves > reworking the opcode description tables to allow efficient two-way > look-up by either IR or hardware opcode.
Patches 1-19 are: Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
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