Reviewed-by: Marek Olšák <marek.ol...@amd.com>

Marek

On Mon, Jun 18, 2018 at 10:32 AM, Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl
> wrote:

> We HTILE compress stencil-only surfaces too.
>
> CC: 18.1 <mesa-sta...@lists.freedesktop.org>
> ---
>  src/amd/common/ac_surface.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
> index 6600ff6b7ef..618b755afc7 100644
> --- a/src/amd/common/ac_surface.c
> +++ b/src/amd/common/ac_surface.c
> @@ -670,7 +670,7 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib,
>                  config->info.levels == 1);
>
>         AddrSurfInfoIn.flags.noStencil = (surf->flags &
> RADEON_SURF_SBUFFER) == 0;
> -       AddrSurfInfoIn.flags.compressZ = AddrSurfInfoIn.flags.depth;
> +       AddrSurfInfoIn.flags.compressZ = !!(surf->flags &
> RADEON_SURF_Z_OR_SBUFFER);
>
>         /* On CI/VI, the DB uses the same pitch and tile mode (except
> tilesplit)
>          * for Z and stencil. This can cause a number of problems which we
> work
> --
> 2.17.1
>
> _______________________________________________
> mesa-stable mailing list
> mesa-sta...@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-stable
>
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Reply via email to