From: Francisco Jerez <curroje...@riseup.net>
This reworks INTERPOLATE_AT_PER_SLOT_OFFSET to work more like an ALU
operation and less like a send. This is less code over-all and, as a
side-effect, it now properly handles execution groups and lowering so
SIMD32 support just falls out.
Reviewed-by: Jason Ekstrand <ja...@jlekstrand.net>
---
src/intel/compiler/brw_fs.cpp | 3 ++-
src/intel/compiler/brw_fs_generator.cpp | 8 +++++---
src/intel/compiler/brw_fs_nir.cpp | 17 ++---------------
3 files changed, 9 insertions(+), 19 deletions(-)
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 6a1fca3..9a93d47 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -818,6 +818,8 @@ fs_inst::components_read(unsigned i) const
else
return 1;
}
+ case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET:
+ return (i == 0 ? 2 : 1);
default:
return 1;
@@ -853,7 +855,6 @@ fs_inst::size_read(int arg) const
case SHADER_OPCODE_TYPED_SURFACE_WRITE:
case FS_OPCODE_INTERPOLATE_AT_SAMPLE:
case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET:
- case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET:
case SHADER_OPCODE_BYTE_SCATTERED_WRITE:
case SHADER_OPCODE_BYTE_SCATTERED_READ:
if (arg == 0)
diff --git a/src/intel/compiler/brw_fs_generator.cpp
b/src/intel/compiler/brw_fs_generator.cpp
index b6919c7..a495496 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1585,16 +1585,18 @@ fs_generator::generate_pixel_interpolator_query(fs_inst
*inst,
struct brw_reg msg_data,
unsigned msg_type)
{
- assert(inst->size_written % REG_SIZE == 0);
+ const bool has_payload = inst->src[0].file != BAD_FILE;
assert(msg_data.type == BRW_REGISTER_TYPE_UD);
+ assert(inst->size_written % REG_SIZE == 0);
brw_pixel_interpolator_query(p,
retype(dst, BRW_REGISTER_TYPE_UW),
- src,
+ /* If we don't have a payload, what we send doesn't matter */
+ has_payload ? src : brw_vec8_grf(0, 0),
inst->pi_noperspective,
msg_type,
msg_data,
- inst->mlen,
+ has_payload ? 2 * inst->exec_size / 8 : 1,
inst->size_written / REG_SIZE);
}
diff --git a/src/intel/compiler/brw_fs_nir.cpp
b/src/intel/compiler/brw_fs_nir.cpp
index 28f056e..50227df 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -1786,21 +1786,8 @@ emit_pixel_interpolater_send(const fs_builder &bld,
{
struct brw_wm_prog_data *wm_prog_data =
brw_wm_prog_data(bld.shader->stage_prog_data);
- fs_inst *inst;
- fs_reg payload;
- int mlen;
- if (src.file == BAD_FILE) {
- /* Dummy payload */
- payload = bld.vgrf(BRW_REGISTER_TYPE_F, 1);
- mlen = 1;
- } else {
- payload = src;
- mlen = 2 * bld.dispatch_width() / 8;
- }
-
- inst = bld.emit(opcode, dst, payload, desc);
- inst->mlen = mlen;
+ fs_inst *inst = bld.emit(opcode, dst, src, desc);
/* 2 floats per slot returned */
inst->size_written = 2 * dst.component_size(inst->exec_size);
inst->pi_noperspective = interpolation == INTERP_MODE_NOPERSPECTIVE;
@@ -3477,7 +3464,7 @@ fs_visitor::nir_emit_fs_intrinsic(const fs_builder &bld,
FS_OPCODE_INTERPOLATE_AT_SAMPLE,
dest,
fs_reg(), /* src */
- msg_data,
+ component(msg_data, 0),
interpolation);
set_predicate(BRW_PREDICATE_NORMAL, inst);
--
2.5.0.400.gff86faf
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