Reviewed-by: Bas Nieuwenhuizen <b...@basnieuwenhuizen.nl>
On Mon, May 21, 2018 at 4:57 PM, Samuel Pitoiset
<samuel.pitoi...@gmail.com> wrote:
> With 32-bit pointers we only need one user SGPR per desc set.
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com>
> ---
> src/amd/vulkan/radv_nir_to_llvm.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
> b/src/amd/vulkan/radv_nir_to_llvm.c
> index c6063dca6c8..54a3d7c1878 100644
> --- a/src/amd/vulkan/radv_nir_to_llvm.c
> +++ b/src/amd/vulkan/radv_nir_to_llvm.c
> @@ -694,8 +694,10 @@ static void allocate_user_sgprs(struct
> radv_shader_context *ctx,
>
> uint32_t available_sgprs = ctx->options->chip_class >= GFX9 ? 32 : 16;
> uint32_t remaining_sgprs = available_sgprs - user_sgpr_count;
> + uint32_t num_desc_set =
> + util_bitcount(ctx->shader_info->info.desc_set_used_mask);
>
> - if (remaining_sgprs / 2 <
> util_bitcount(ctx->shader_info->info.desc_set_used_mask)) {
> + if (remaining_sgprs / (HAVE_32BIT_POINTERS ? 1 : 2) < num_desc_set) {
> user_sgpr_info->indirect_all_descriptor_sets = true;
> }
> }
> --
> 2.17.0
>
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