For a while now, Curro has had a branch floating around to enable SIMD32 fragment shaders. I'm trying to revive it and get things in shape for possibly merging. This series contains a bunch of refactor patches which don't really have anything to do with SIMD32 other than that they make it easier.
About half of the patches are from Curro with a couple modifications of mine. The other half are written by me but some of them are based on patches Curro wrote a while ago. It's all a bit of a mish-mash. Cc: Francisco Jerez <curroje...@riseup.net> Francisco Jerez (10): intel/eu: Remove brw_codegen::compressed_stack. intel/fs: Rename a local variable so it doesn't shadow component() intel/fs: Use the ATTR file for FS inputs intel/fs: Replace the CINTERP opcode with a simple MOV intel/fs: Add explicit last_rt flag to fb writes orthogonal to eot. intel/fs: Fix Gen4-5 FB write AA data payload munging for non-EOT writes. intel/eu: Return new instruction to caller from brw_fb_WRITE(). intel/fs: Fix fs_inst::flags_written() for Gen4-5 FB writes. intel/fs: Fix implied_mrf_writes() for headerless FB writes. intel/fs: Remove program key argument from generator. Jason Ekstrand (9): intel/fs: Assert that the gen4-6 plane restrictions are followed intel/fs: Use groups for SIMD16 LINTERP on gen11+ intel/fs: FS_OPCODE_REP_FB_WRITE has side effects intel/fs: Properly track implied header regs read by FB writes intel/fs: Pull FB write implied headers from src[0] intel/fs: Set up FB write message headers in the visitor i965: Re-arrange shader kernel setup in WM state intel/compiler: Add and use helpers for working with KSP indices intel/fs: Rework KSP data to be SIMD width-based src/intel/blorp/blorp_genX_exec.h | 47 +++--- src/intel/compiler/brw_compiler.h | 87 ++++++++++- src/intel/compiler/brw_eu.h | 21 ++- src/intel/compiler/brw_eu_defines.h | 1 - src/intel/compiler/brw_eu_emit.c | 24 ++-- src/intel/compiler/brw_fs.cpp | 198 +++++++++++++++++++------- src/intel/compiler/brw_fs.h | 4 +- src/intel/compiler/brw_fs_cse.cpp | 1 - src/intel/compiler/brw_fs_generator.cpp | 135 +++++------------- src/intel/compiler/brw_fs_nir.cpp | 16 +-- src/intel/compiler/brw_fs_visitor.cpp | 14 +- src/intel/compiler/brw_ir_fs.h | 1 + src/intel/compiler/brw_shader.cpp | 9 +- src/intel/compiler/brw_vec4.cpp | 2 +- src/intel/compiler/brw_vec4_gs_visitor.cpp | 2 +- src/intel/compiler/brw_vec4_tcs.cpp | 2 +- src/intel/vulkan/genX_pipeline.c | 18 ++- src/mesa/drivers/dri/i965/gen4_blorp_exec.h | 16 ++- src/mesa/drivers/dri/i965/genX_state_upload.c | 125 ++++++++++------ 19 files changed, 444 insertions(+), 279 deletions(-) -- 2.5.0.400.gff86faf _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev