From: Chris Wilson <ch...@chris-wilson.co.uk> Previously the miptree map and unmap functions performed the mapping/unmapping decisions and also tracked the state of maps in the miptree structure for later unmapping. By splitting the logic and state management, a later patch will be able to make recursive use of the map function without running afoul of the state management.
Reviewed-by: Scott D Phillips <scott.d.phill...@intel.com> --- src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 96 ++++++++++++++++++--------- 1 file changed, 64 insertions(+), 32 deletions(-) diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index b3b27c50de3..948ddc4969e 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -54,6 +54,18 @@ #define FILE_DEBUG_FLAG DEBUG_MIPTREE +static void __intel_miptree_map(struct brw_context *brw, + struct intel_mipmap_tree *mt, + unsigned int level, + unsigned int slice, + struct intel_miptree_map *map); + +static void __intel_miptree_unmap(struct brw_context *brw, + struct intel_mipmap_tree *mt, + unsigned int level, + unsigned int slice, + struct intel_miptree_map *map); + static void *intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt, GLbitfield mode); @@ -3720,6 +3732,42 @@ use_intel_mipree_map_blit(struct brw_context *brw, return false; } +static void +__intel_miptree_map(struct brw_context *brw, + struct intel_mipmap_tree *mt, + unsigned int level, + unsigned int slice, + struct intel_miptree_map *map) +{ + intel_miptree_access_raw(brw, mt, level, slice, + map->mode & GL_MAP_WRITE_BIT); + + if (mt->format == MESA_FORMAT_S_UINT8) { + intel_miptree_map_s8(brw, mt, map, level, slice); + } else if (mt->etc_format != MESA_FORMAT_NONE && + !(map->mode & BRW_MAP_DIRECT_BIT)) { + intel_miptree_map_etc(brw, mt, map, level, slice); + } else if (mt->stencil_mt && !(map->mode & BRW_MAP_DIRECT_BIT)) { + intel_miptree_map_depthstencil(brw, mt, map, level, slice); + } else if (use_intel_mipree_map_blit(brw, mt, map->mode, level, slice)) { + intel_miptree_map_blit(brw, mt, map, level, slice); +#if defined(USE_SSE41) + } else if (!(map->mode & GL_MAP_WRITE_BIT) && + !mt->compressed && cpu_has_sse4_1 && + (mt->surf.row_pitch % 16 == 0) && + (mt->surf.tiling == ISL_TILING_LINEAR)) { + intel_miptree_map_movntdqa(brw, mt, map, level, slice); +#endif + } else if (mt->surf.tiling != ISL_TILING_LINEAR && + brw->screen->devinfo.gen > 4) { + intel_miptree_map_tiled_memcpy(brw, mt, map, level, slice); + } else { + if (mt->surf.tiling != ISL_TILING_LINEAR) + perf_debug("intel_miptree_map: mapping via gtt"); + intel_miptree_map_map(brw, mt, map, level, slice); + } +} + /** * Parameter \a out_stride has type ptrdiff_t not because the buffer stride may * exceed 32 bits but to diminish the likelihood subtle bugs in pointer @@ -3755,33 +3803,7 @@ intel_miptree_map(struct brw_context *brw, return; } - intel_miptree_access_raw(brw, mt, level, slice, - map->mode & GL_MAP_WRITE_BIT); - - if (mt->format == MESA_FORMAT_S_UINT8) { - intel_miptree_map_s8(brw, mt, map, level, slice); - } else if (mt->etc_format != MESA_FORMAT_NONE && - !(mode & BRW_MAP_DIRECT_BIT)) { - intel_miptree_map_etc(brw, mt, map, level, slice); - } else if (mt->stencil_mt && !(mode & BRW_MAP_DIRECT_BIT)) { - intel_miptree_map_depthstencil(brw, mt, map, level, slice); - } else if (use_intel_mipree_map_blit(brw, mt, mode, level, slice)) { - intel_miptree_map_blit(brw, mt, map, level, slice); -#if defined(USE_SSE41) - } else if (!(mode & GL_MAP_WRITE_BIT) && - !mt->compressed && cpu_has_sse4_1 && - (mt->surf.row_pitch % 16 == 0) && - (mt->surf.tiling == ISL_TILING_LINEAR)) { - intel_miptree_map_movntdqa(brw, mt, map, level, slice); -#endif - } else if (mt->surf.tiling != ISL_TILING_LINEAR && - brw->screen->devinfo.gen > 4) { - intel_miptree_map_tiled_memcpy(brw, mt, map, level, slice); - } else { - if (mt->surf.tiling != ISL_TILING_LINEAR) - perf_debug("intel_miptree_map: mapping via gtt"); - intel_miptree_map_map(brw, mt, map, level, slice); - } + __intel_miptree_map(brw, mt, level, slice, map); *out_ptr = map->ptr; *out_stride = map->stride; @@ -3790,6 +3812,20 @@ intel_miptree_map(struct brw_context *brw, intel_miptree_release_map(mt, level, slice); } +static void +__intel_miptree_unmap(struct brw_context *brw, + struct intel_mipmap_tree *mt, + unsigned int level, + unsigned int slice, + struct intel_miptree_map *map) +{ + DBG("%s: mt %p (%s) level %d slice %d\n", __func__, + mt, _mesa_get_format_name(mt->format), level, slice); + + if (map->unmap) + map->unmap(brw, mt, map, level, slice); +} + void intel_miptree_unmap(struct brw_context *brw, struct intel_mipmap_tree *mt, @@ -3803,11 +3839,7 @@ intel_miptree_unmap(struct brw_context *brw, if (!map) return; - DBG("%s: mt %p (%s) level %d slice %d\n", __func__, - mt, _mesa_get_format_name(mt->format), level, slice); - - if (map->unmap) - map->unmap(brw, mt, map, level, slice); + __intel_miptree_unmap(brw, mt, level, slice, map); intel_miptree_release_map(mt, level, slice); } -- 2.14.3 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev