Reviewed-by: Neha Bhende<bhen...@vmware.com> ________________________________ From: Brian Paul <bri...@vmware.com> Sent: Thursday, March 29, 2018 9:02:45 PM To: mesa-dev@lists.freedesktop.org Cc: Neha Bhende; Charmaine Lee Subject: [PATCH] nir: s/uint/unsigned/ to fix MSVC/MinGW build
--- src/compiler/glsl/glsl_to_nir.cpp | 2 +- src/compiler/nir/nir_gather_info.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp index c4a6d52..dbb58d8 100644 --- a/src/compiler/glsl/glsl_to_nir.cpp +++ b/src/compiler/glsl/glsl_to_nir.cpp @@ -369,7 +369,7 @@ nir_visitor::visit(ir_variable *ir) /* Mark all the locations that require two slots */ if (shader->info.stage == MESA_SHADER_VERTEX && glsl_type_is_dual_slot(glsl_without_array(var->type))) { - for (uint i = 0; i < glsl_count_attribute_slots(var->type, true); i++) { + for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, true); i++) { uint64_t bitfield = BITFIELD64_BIT(var->data.location + i); shader->info.vs.double_inputs |= bitfield; } diff --git a/src/compiler/nir/nir_gather_info.c b/src/compiler/nir/nir_gather_info.c index 743f968..5530009 100644 --- a/src/compiler/nir/nir_gather_info.c +++ b/src/compiler/nir/nir_gather_info.c @@ -250,7 +250,7 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader) if (shader->info.stage == MESA_SHADER_VERTEX && var->data.mode == nir_var_shader_in && glsl_type_is_dual_slot(glsl_without_array(var->type))) { - for (uint i = 0; i < glsl_count_attribute_slots(var->type, false); i++) { + for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, false); i++) { int idx = var->data.location + i; shader->info.vs.double_inputs |= BITFIELD64_BIT(idx); } -- 2.7.4
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