Nvidia hardware can do that natively so there is no need to lower that to four
TG4s instructions.
Signed-off-by: Karol Herbst <kher...@redhat.com>
---
src/compiler/glsl/glsl_to_nir.cpp | 25 ++++++++++++++++++-------
src/compiler/nir/nir.h | 9 ++++++++-
src/compiler/nir/nir_print.c | 9 +++++++++
3 files changed, 35 insertions(+), 8 deletions(-)
diff --git a/src/compiler/glsl/glsl_to_nir.cpp
b/src/compiler/glsl/glsl_to_nir.cpp
index c4a6d52a5b2..4ea5f1616a7 100644
--- a/src/compiler/glsl/glsl_to_nir.cpp
+++ b/src/compiler/glsl/glsl_to_nir.cpp
@@ -2042,7 +2042,9 @@ nir_visitor::visit(ir_texture *ir)
num_srcs++;
if (ir->shadow_comparator != NULL)
num_srcs++;
- if (ir->offset != NULL)
+ if (ir->offset != NULL && ir->offset->type->is_array())
+ num_srcs += ir->offset->type->array_size();
+ else if (ir->offset != NULL)
num_srcs++;
nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
@@ -2097,12 +2099,21 @@ nir_visitor::visit(ir_texture *ir)
if (ir->offset != NULL) {
/* we don't support multiple offsets yet */
- assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
-
- instr->src[src_number].src =
- nir_src_for_ssa(evaluate_rvalue(ir->offset));
- instr->src[src_number].src_type = nir_tex_src_offset;
- src_number++;
+ if (ir->offset->type->is_vector() || ir->offset->type->is_scalar()) {
+ instr->src[src_number].src =
+ nir_src_for_ssa(evaluate_rvalue(ir->offset));
+ instr->src[src_number].src_type = nir_tex_src_offset;
+ src_number++;
+ } else if (ir->offset->type->is_array()) {
+ for (int i = 0; i < ir->offset->type->array_size(); i++) {
+ instr->src[src_number].src =
+
nir_src_for_ssa(evaluate_rvalue(ir->offset->as_constant()->get_array_element(i)->as_rvalue()));
+ instr->src[src_number].src_type =
(nir_tex_src_type)(nir_tex_src_offset + i);
+ src_number++;
+ }
+ } else {
+ assert(false);
+ }
}
switch (ir->op) {
diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index 9fff1f4647d..7b02c4af05f 100644
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -1175,6 +1175,9 @@ typedef enum {
nir_tex_src_projector,
nir_tex_src_comparator, /* shadow comparator */
nir_tex_src_offset,
+ nir_tex_src_offset1,
+ nir_tex_src_offset2,
+ nir_tex_src_offset3,
nir_tex_src_bias,
nir_tex_src_lod,
nir_tex_src_ms_index, /* MSAA sample index */
@@ -1377,6 +1380,9 @@ nir_tex_instr_src_type(const nir_tex_instr *instr,
unsigned src)
return nir_type_float;
case nir_tex_src_offset:
+ case nir_tex_src_offset1:
+ case nir_tex_src_offset2:
+ case nir_tex_src_offset3:
case nir_tex_src_ms_index:
case nir_tex_src_texture_offset:
case nir_tex_src_sampler_offset:
@@ -1408,7 +1414,8 @@ nir_tex_instr_src_size(const nir_tex_instr *instr,
unsigned src)
/* Usual APIs don't allow cube + offset, but we allow it, with 2 coords for
* the offset, since a cube maps to a single face.
*/
- if (instr->src[src].src_type == nir_tex_src_offset) {
+ if (instr->src[src].src_type >= nir_tex_src_offset &&
+ instr->src[src].src_type <= nir_tex_src_offset3) {
if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE)
return 2;
else if (instr->is_array)
diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c
index 21f13097651..e13a4f9aa6d 100644
--- a/src/compiler/nir/nir_print.c
+++ b/src/compiler/nir/nir_print.c
@@ -751,6 +751,15 @@ print_tex_instr(nir_tex_instr *instr, print_state *state)
case nir_tex_src_offset:
fprintf(fp, "(offset)");
break;
+ case nir_tex_src_offset1:
+ fprintf(fp, "(offset1)");
+ break;
+ case nir_tex_src_offset2:
+ fprintf(fp, "(offset2)");
+ break;
+ case nir_tex_src_offset3:
+ fprintf(fp, "(offset3)");
+ break;
case nir_tex_src_bias:
fprintf(fp, "(bias)");
break;
--
2.14.3
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
