[Mesa-dev] [PATCH 1/4] ac/surface: set AddrSurfInfoIn.format = ADDR_FMT_8, add assertions

[Marek Olšák]

From: Marek Olšák <marek.ol...@amd.com>

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105738
---
 src/amd/common/ac_surface.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c
index 12dfc0cb1f2..81882576baf 100644
--- a/src/amd/common/ac_surface.c
+++ b/src/amd/common/ac_surface.c
@@ -1150,32 +1150,39 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib,
                        break;
                case 16:
                        AddrSurfInfoIn.format = ADDR_FMT_BC3;
                        break;
                default:
                        assert(0);
                }
        } else {
                switch (surf->bpe) {
                case 1:
+                       assert(!(surf->flags & RADEON_SURF_ZBUFFER));
                        AddrSurfInfoIn.format = ADDR_FMT_8;
                        break;
                case 2:
+                       assert(surf->flags & RADEON_SURF_ZBUFFER ||
+                              !(surf->flags & RADEON_SURF_SBUFFER));
                        AddrSurfInfoIn.format = ADDR_FMT_16;
                        break;
                case 4:
+                       assert(surf->flags & RADEON_SURF_ZBUFFER ||
+                              !(surf->flags & RADEON_SURF_SBUFFER));
                        AddrSurfInfoIn.format = ADDR_FMT_32;
                        break;
                case 8:
+                       assert(!(surf->flags & RADEON_SURF_Z_OR_SBUFFER));
                        AddrSurfInfoIn.format = ADDR_FMT_32_32;
                        break;
                case 16:
+                       assert(!(surf->flags & RADEON_SURF_Z_OR_SBUFFER));
                        AddrSurfInfoIn.format = ADDR_FMT_32_32_32_32;
                        break;
                default:
                        assert(0);
                }
                AddrSurfInfoIn.bpp = surf->bpe * 8;
        }
 
        AddrSurfInfoIn.flags.color = !(surf->flags & RADEON_SURF_Z_OR_SBUFFER);
        AddrSurfInfoIn.flags.depth = (surf->flags & RADEON_SURF_ZBUFFER) != 0;
@@ -1251,20 +1258,21 @@ static int gfx9_compute_surface(ADDR_HANDLE addrlib,
        /* Calculate texture layout information. */
        r = gfx9_compute_miptree(addrlib, config, surf, compressed,
                                 &AddrSurfInfoIn);
        if (r)
                return r;
 
        /* Calculate texture layout information for stencil. */
        if (surf->flags & RADEON_SURF_SBUFFER) {
                AddrSurfInfoIn.flags.stencil = 1;
                AddrSurfInfoIn.bpp = 8;
+               AddrSurfInfoIn.format = ADDR_FMT_8;
 
                if (!AddrSurfInfoIn.flags.depth) {
                        r = gfx9_get_preferred_swizzle_mode(addrlib, 
&AddrSurfInfoIn, false,
                                                            
&AddrSurfInfoIn.swizzleMode);
                        if (r)
                                return r;
                } else
                        AddrSurfInfoIn.flags.depth = 0;
 
                r = gfx9_compute_miptree(addrlib, config, surf, compressed,
-- 
2.15.1

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