On 08/03/18 17:00, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-03-08 15:42:53)
+static void
+read_gt_frequency(struct brw_context *brw,
+ struct brw_perf_query_object *obj)
+{
+ const struct gen_device_info *devinfo = &brw->screen->devinfo;
+ uint32_t *start_reg = obj->oa.map + MI_FREQ_START_OFFSET_BYTES,
+ *end_reg = obj->oa.map + MI_FREQ_END_OFFSET_BYTES;
+
+ switch (devinfo->gen) {
+ case 7:
+ case 8:
+ obj->oa.gt_frequency[0] =
+ ((start_reg[0] & GEN6_RPSTAT1_CURR_GT_FREQ_MASK) >>
+ GEN6_RPSTAT1_CURR_GT_FREQ_SHIFT) * 50ULL;
+ obj->oa.gt_frequency[1] =
+ ((end_reg[0] & GEN6_RPSTAT1_CURR_GT_FREQ_MASK) >>
+ GEN6_RPSTAT1_CURR_GT_FREQ_SHIFT) * 50ULL;
I was just thinking this was the wrong frequency conversion for byt/bsw,
but then they don't have RPSTAT1 either. Is the OA only for big core?
I think you found a bug!
I can see in the internal documentation that CHV has RPSTAT1, except it
doesn't have the fields we want.
So this needs to be dealt with/fixed.
On BXT I got sensible numbers from this register, so that leaves gen8
based small cores in the unknown...
Documentation is again unhelpful...
Thanks,
-
Lionel
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