On 02/28/2018 08:36 AM, Ilia Mirkin wrote:
Can st/mesa instead be fixed to maintain the original API? Other drivers look in rt[0] in the non-independent_blend_enable case. For example, freedreno and nouveau.
If independent blend is not in use, then rt[0] will have all the blending info, as before.
The case that broke for us was when PIPE_CAP_INDEP_BLEND_FUNC==0 and independent blend was enabled for rt[i] where i > 0. Before, the blend src/dst terms were in rt[0] but now they're in rt[i].
I'd rather not change the semantics again. -Brian
On Wed, Feb 28, 2018 at 10:29 AM, Brian Paul <bri...@vmware.com> wrote:The earlier Mesa commit 3d06c8afb5 ("st/mesa: don't translate blend state when it's disabled for a colorbuffer") subtly changed the details of gallium's per-RT blend state. In particular, when pipe_rt_blend_state[i].blend_enabled is true, we have to get the src/dst blend terms from pipe_rt_blend_state[i], not [0] as before. We now have to scan the blend targets to find the first one that's enabled (if any). We have to use the index of that target for getting the src/dst blend terms. And note that we have to set identical blend terms for all targets. This fixes the Piglit fbo-drawbuffers2-blend test. VMware bug 2063493. --- src/gallium/drivers/svga/svga_pipe_blend.c | 35 ++++++++++++++++++++---------- 1 file changed, 24 insertions(+), 11 deletions(-) diff --git a/src/gallium/drivers/svga/svga_pipe_blend.c b/src/gallium/drivers/svga/svga_pipe_blend.c index 04855fa..6bb9d94 100644 --- a/src/gallium/drivers/svga/svga_pipe_blend.c +++ b/src/gallium/drivers/svga/svga_pipe_blend.c @@ -148,6 +148,17 @@ svga_create_blend_state(struct pipe_context *pipe, if (!blend) return NULL; + /* Find index of first target with blending enabled. -1 means blending + * is not enabled at all. + */ + int first_enabled = -1; + for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) { + if (templ->rt[i].blend_enable) { + first_enabled = i; + break; + } + } + /* Fill in the per-rendertarget blend state. We currently only * support independent blend enable and colormask per render target. */ @@ -260,24 +271,26 @@ svga_create_blend_state(struct pipe_context *pipe, } } else { - /* Note: the vgpu10 device does not yet support independent - * blend terms per render target. Target[0] always specifies the - * blending terms. + /* Note: the vgpu10 device does not yet support independent blend + * terms per render target. When blending is enabled, the blend + * terms must match for all targets. */ - if (templ->independent_blend_enable || templ->rt[0].blend_enable) { - /* always use the 0th target's blending terms for now */ + if (first_enabled >= 0) { + /* use first enabled target's blending terms */ + const struct pipe_rt_blend_state *rt = &templ->rt[first_enabled]; + blend->rt[i].srcblend = - svga_translate_blend_factor(svga, templ->rt[0].rgb_src_factor); + svga_translate_blend_factor(svga, rt->rgb_src_factor); blend->rt[i].dstblend = - svga_translate_blend_factor(svga, templ->rt[0].rgb_dst_factor); + svga_translate_blend_factor(svga, rt->rgb_dst_factor); blend->rt[i].blendeq = - svga_translate_blend_func(templ->rt[0].rgb_func); + svga_translate_blend_func(rt->rgb_func); blend->rt[i].srcblend_alpha = - svga_translate_blend_factor(svga, templ->rt[0].alpha_src_factor); + svga_translate_blend_factor(svga, rt->alpha_src_factor); blend->rt[i].dstblend_alpha = - svga_translate_blend_factor(svga, templ->rt[0].alpha_dst_factor); + svga_translate_blend_factor(svga, rt->alpha_dst_factor); blend->rt[i].blendeq_alpha = - svga_translate_blend_func(templ->rt[0].alpha_func); + svga_translate_blend_func(rt->alpha_func); if (blend->rt[i].srcblend_alpha != blend->rt[i].srcblend || blend->rt[i].dstblend_alpha != blend->rt[i].dstblend || -- 2.7.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://urldefense.proofpoint.com/v2/url?u=https-3A__lists.freedesktop.org_mailman_listinfo_mesa-2Ddev&d=DwIBaQ&c=uilaK90D4TOVoH58JNXRgQ&r=Ie7_encNUsqxbSRbqbNgofw0ITcfE8JKfaUjIQhncGA&m=72mZC9F35bZXJK1nvsVtzu5aKILU-K1dy8FEsy2WnfU&s=wzSB-UOk_lz1oaznhV3p-XBGArDxVYuIH4ThYpac5Us&e=
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