On Thu, Jan 18, 2018 at 01:31:18AM -0800, Kenneth Graunke wrote:
> Meta is awful and we'd like to stop using it.  Implementing this using
> BLORP allows us to stop trashing a bunch of GL state every time.
> 
> This follows the structure of st_generate_mipmap().
> compute_num_levels is lifted directly from there.
> 
> Improves performance in Gl41HdrBloom by about 11.794% +/- 1.01919% (n=3)
> on Kabylake GT2 at 1280x720 (the difference seems much smaller at higher
> resolutions).
> 
> This appears to regress nv_conditional_render-clear on g965 when run
> in the CI, but the test passes when run one-at-a-time.  It's unclear
> what's going on here, as conditional rendering is done on the CPU on
> these older platforms.
> 
> v2 (idr): Don't try depth or depth-stencil blorp blits on Gen4 or Gen5
> because it's not implemented yet.

Patches 1,2 and 4:

Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>

> 
> Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
> ---
>  src/mesa/drivers/dri/i965/Makefile.sources      |   1 +
>  src/mesa/drivers/dri/i965/brw_context.c         |   2 +
>  src/mesa/drivers/dri/i965/brw_context.h         |   4 +
>  src/mesa/drivers/dri/i965/brw_generate_mipmap.c | 127 
> ++++++++++++++++++++++++
>  src/mesa/drivers/dri/i965/meson.build           |   1 +
>  5 files changed, 135 insertions(+)
>  create mode 100644 src/mesa/drivers/dri/i965/brw_generate_mipmap.c
> 
> diff --git a/src/mesa/drivers/dri/i965/Makefile.sources 
> b/src/mesa/drivers/dri/i965/Makefile.sources
> index d928f71b431..68dba8058b2 100644
> --- a/src/mesa/drivers/dri/i965/Makefile.sources
> +++ b/src/mesa/drivers/dri/i965/Makefile.sources
> @@ -22,6 +22,7 @@ i965_FILES = \
>       brw_ff_gs_emit.c \
>       brw_ff_gs.h \
>       brw_formatquery.c \
> +     brw_generate_mipmap.c \
>       brw_gs.c \
>       brw_gs.h \
>       brw_gs_surface_state.c \
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c 
> b/src/mesa/drivers/dri/i965/brw_context.c
> index c30eae420cd..b41d4d66c49 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -302,6 +302,8 @@ brw_init_driver_functions(struct brw_context *brw,
>     brw_init_compute_functions(functions);
>     brw_init_conditional_render_functions(functions);
>  
> +   functions->GenerateMipmap = brw_generate_mipmap;
> +
>     functions->QueryInternalFormat = brw_query_internal_format;
>  
>     functions->NewTransformFeedback = brw_new_transform_feedback;
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h 
> b/src/mesa/drivers/dri/i965/brw_context.h
> index 79e9f49a389..9db91af7567 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -1576,6 +1576,10 @@ brw_blorp_copytexsubimage(struct brw_context *brw,
>                            int dstX0, int dstY0,
>                            int width, int height);
>  
> +/* brw_generate_mipmap.c */
> +void brw_generate_mipmap(struct gl_context *ctx, GLenum target,
> +                         struct gl_texture_object *tex_obj);
> +
>  void
>  gen6_get_sample_position(struct gl_context *ctx,
>                           struct gl_framebuffer *fb,
> diff --git a/src/mesa/drivers/dri/i965/brw_generate_mipmap.c 
> b/src/mesa/drivers/dri/i965/brw_generate_mipmap.c
> new file mode 100644
> index 00000000000..32c2933f721
> --- /dev/null
> +++ b/src/mesa/drivers/dri/i965/brw_generate_mipmap.c
> @@ -0,0 +1,127 @@
> +/*
> + * Copyright © 2016 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 
> DEALINGS
> + * IN THE SOFTWARE.
> + */
> +
> +#include "main/mipmap.h"
> +#include "main/teximage.h"
> +#include "brw_blorp.h"
> +#include "brw_context.h"
> +#include "intel_tex.h"
> +#include "drivers/common/meta.h"
> +
> +#define FILE_DEBUG_FLAG DEBUG_BLORP
> +
> +
> +/**
> + * The GenerateMipmap() driver hook.
> + */
> +void
> +brw_generate_mipmap(struct gl_context *ctx, GLenum target,
> +                    struct gl_texture_object *tex_obj)
> +{
> +   struct brw_context *brw = brw_context(ctx);
> +   struct gen_device_info *devinfo = &brw->screen->devinfo;
> +   struct intel_texture_object *intel_obj = intel_texture_object(tex_obj);
> +   const unsigned base_level = tex_obj->BaseLevel;
> +   unsigned last_level, first_layer, last_layer;
> +
> +   /* Blorp doesn't handle combined depth/stencil surfaces on Gen4-5 yet. */
> +   if (devinfo->gen <= 5 &&
> +       (tex_obj->Image[0][base_level]->_BaseFormat == GL_DEPTH_COMPONENT ||
> +        tex_obj->Image[0][base_level]->_BaseFormat == GL_DEPTH_STENCIL)) {
> +      _mesa_meta_GenerateMipmap(ctx, target, tex_obj);
> +      return;
> +   }
> +
> +   /* find expected last mipmap level to generate */
> +   last_level = _mesa_compute_num_levels(ctx, tex_obj, target) - 1;
> +
> +   if (last_level == 0)
> +      return;
> +
> +   /* The texture isn't in a "complete" state yet so set the expected
> +    * last_level here; we're not going through normal texture validation.
> +    */
> +   intel_obj->_MaxLevel = last_level;
> +
> +   if (!tex_obj->Immutable) {
> +      _mesa_prepare_mipmap_levels(ctx, tex_obj, base_level, last_level);
> +
> +      /* At this point, memory for all the texture levels has been
> +       * allocated.  However, the base level image may be in one resource
> +       * while the subsequent/smaller levels may be in another resource.
> +       * Finalizing the texture will copy the base images from the former
> +       * resource to the latter.
> +       *
> +       * After this, we'll have all mipmap levels in one resource.
> +       */
> +      intel_finalize_mipmap_tree(brw, tex_obj);
> +   }
> +
> +   struct intel_mipmap_tree *mt = intel_obj->mt;
> +   if (!mt) {
> +      _mesa_error(ctx, GL_OUT_OF_MEMORY, "mipmap generation");
> +      return;
> +   }
> +
> +   const mesa_format format = intel_obj->_Format;
> +
> +   /* Fall back to the CPU for non-renderable cases.
> +    *
> +    * TODO: 3D textures require blending data from multiple slices,
> +    * which means we need custom shaders.  For now, fall back.
> +    */
> +   if (!brw->mesa_format_supports_render[format] || target == GL_TEXTURE_3D) 
> {
> +      _mesa_generate_mipmap(ctx, target, tex_obj);
> +      return;
> +   }
> +
> +   const struct isl_extent4d *base_size = &mt->surf.logical_level0_px;
> +
> +   if (mt->target == GL_TEXTURE_CUBE_MAP) {
> +      first_layer = _mesa_tex_target_to_face(target);
> +      last_layer = first_layer;
> +   } else {
> +      first_layer = 0;
> +      last_layer = base_size->array_len - 1;
> +   }
> +
> +   for (unsigned dst_level = base_level + 1;
> +        dst_level <= last_level;
> +        dst_level++) {
> +
> +      const unsigned src_level = dst_level - 1;
> +
> +      for (unsigned layer = first_layer; layer <= last_layer; layer++) {
> +         brw_blorp_blit_miptrees(brw, mt, src_level, layer, format,
> +                                 SWIZZLE_XYZW, mt, dst_level, layer, format,
> +                                 0, 0,
> +                                 minify(base_size->width, src_level),
> +                                 minify(base_size->height, src_level),
> +                                 0, 0,
> +                                 minify(base_size->width, dst_level),
> +                                 minify(base_size->height, dst_level),
> +                                 GL_LINEAR, false, false,
> +                                 true, true);
> +      }
> +   }
> +}
> diff --git a/src/mesa/drivers/dri/i965/meson.build 
> b/src/mesa/drivers/dri/i965/meson.build
> index 9adda06183d..46090978ed6 100644
> --- a/src/mesa/drivers/dri/i965/meson.build
> +++ b/src/mesa/drivers/dri/i965/meson.build
> @@ -42,6 +42,7 @@ files_i965 = files(
>    'brw_ff_gs_emit.c',
>    'brw_ff_gs.h',
>    'brw_formatquery.c',
> +  'brw_generate_mipmap.c',
>    'brw_gs.c',
>    'brw_gs.h',
>    'brw_gs_surface_state.c',
> -- 
> 2.15.1
> 
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