Looks good to me. Reviewed-by: Timothy Arceri <tarc...@itsqueeze.com>
On 12/01/18 22:49, Samuel Pitoiset wrote:
This shouldn't be scanned in the pipeline. Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> --- src/amd/common/ac_nir_to_llvm.c | 2 +- src/amd/common/ac_nir_to_llvm.h | 1 - src/amd/common/ac_shader_info.c | 4 ++++ src/amd/common/ac_shader_info.h | 3 +++ src/amd/vulkan/radv_pipeline.c | 2 -- 5 files changed, 8 insertions(+), 4 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 0e1fefede5..1177dba0a6 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -6293,7 +6293,7 @@ write_tess_factors(struct nir_to_llvm_context *ctx) 16 + tf_offset, 1, 0, true, false);//store to offchip for TES to read - only if TES reads them- if (ctx->options->key.tcs.tes_reads_tess_factors) { + if (ctx->shader_info->info.tes.reads_tess_factors) { LLVMValueRef inner_vec, outer_vec, tf_outer_offset; LLVMValueRef tf_inner_offset; unsigned param_outer, param_inner; diff --git a/src/amd/common/ac_nir_to_llvm.h b/src/amd/common/ac_nir_to_llvm.h index b3ad0a0985..cb1a9fb8ef 100644 --- a/src/amd/common/ac_nir_to_llvm.h +++ b/src/amd/common/ac_nir_to_llvm.h @@ -55,7 +55,6 @@ struct ac_tcs_variant_key { struct ac_vs_variant_key vs_key; unsigned primitive_mode; unsigned input_vertices; - uint32_t tes_reads_tess_factors:1; };struct ac_fs_variant_key {diff --git a/src/amd/common/ac_shader_info.c b/src/amd/common/ac_shader_info.c index 5716ec043d..7261261850 100644 --- a/src/amd/common/ac_shader_info.c +++ b/src/amd/common/ac_shader_info.c @@ -106,6 +106,10 @@ gather_intrinsic_info(const nir_intrinsic_instr *instr, mark_sampler_desc(instr->variables[0]->var, info); break; } + case nir_intrinsic_load_tess_level_inner: + case nir_intrinsic_load_tess_level_outer: + info->tes.reads_tess_factors = true; + break; default: break; } diff --git a/src/amd/common/ac_shader_info.h b/src/amd/common/ac_shader_info.h index 2be61679fc..fbafeb9f0e 100644 --- a/src/amd/common/ac_shader_info.h +++ b/src/amd/common/ac_shader_info.h @@ -49,6 +49,9 @@ struct ac_shader_info { bool uses_thread_id[3]; bool uses_local_invocation_idx; } cs; + struct { + bool reads_tess_factors; + } tes; };/* A NIR pass to gather all the info needed to optimise the allocation patternsdiff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c index c3c17af850..0bb1cd9dff 100644 --- a/src/amd/vulkan/radv_pipeline.c +++ b/src/amd/vulkan/radv_pipeline.c @@ -1759,8 +1759,6 @@ radv_fill_shader_keys(struct ac_shader_variant_key *keys, keys[MESA_SHADER_VERTEX].vs.as_ls = true; keys[MESA_SHADER_TESS_CTRL].tcs.input_vertices = key->tess_input_vertices; keys[MESA_SHADER_TESS_CTRL].tcs.primitive_mode = nir[MESA_SHADER_TESS_EVAL]->info.tess.primitive_mode; - - keys[MESA_SHADER_TESS_CTRL].tcs.tes_reads_tess_factors = !!(nir[MESA_SHADER_TESS_EVAL]->info.inputs_read & (VARYING_BIT_TESS_LEVEL_INNER | VARYING_BIT_TESS_LEVEL_OUTER)); }if (nir[MESA_SHADER_GEOMETRY]) {
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