From: Roland Scheidegger <srol...@vmware.com>

It looks like this reloc belongs to setting the constant reg, which is skipped
for gs ring.
---
 src/gallium/drivers/r600/evergreen_state.c | 7 +++----
 src/gallium/drivers/r600/r600_state.c      | 7 +++----
 2 files changed, 6 insertions(+), 8 deletions(-)

diff --git a/src/gallium/drivers/r600/evergreen_state.c 
b/src/gallium/drivers/r600/evergreen_state.c
index 0da665f634..81b7c4a285 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -2172,12 +2172,11 @@ static void evergreen_emit_constant_buffers(struct 
r600_context *rctx,
                                                    
DIV_ROUND_UP(cb->buffer_size, 256), pkt_flags);
                        radeon_set_context_reg_flag(cs, reg_alu_const_cache + 
buffer_index * 4, va >> 8,
                                                    pkt_flags);
+                       radeon_emit(cs, PKT3(PKT3_NOP, 0, 0) | pkt_flags);
+                       radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, 
&rctx->b.gfx, rbuffer,
+                                                                 
RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER));
                }
 
-               radeon_emit(cs, PKT3(PKT3_NOP, 0, 0) | pkt_flags);
-               radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, 
&rctx->b.gfx, rbuffer,
-                                                     RADEON_USAGE_READ, 
RADEON_PRIO_CONST_BUFFER));
-
                radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 8, 0) | pkt_flags);
                radeon_emit(cs, (buffer_id_base + buffer_index) * 8);
                radeon_emit(cs, va); /* RESOURCEi_WORD0 */
diff --git a/src/gallium/drivers/r600/r600_state.c 
b/src/gallium/drivers/r600/r600_state.c
index cbf860f45f..253ff57a98 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -1715,12 +1715,11 @@ static void r600_emit_constant_buffers(struct 
r600_context *rctx,
                        radeon_set_context_reg(cs, reg_alu_constbuf_size + 
buffer_index * 4,
                                               DIV_ROUND_UP(cb->buffer_size, 
256));
                        radeon_set_context_reg(cs, reg_alu_const_cache + 
buffer_index * 4, offset >> 8);
+                       radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
+                       radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, 
&rctx->b.gfx, rbuffer,
+                                                                 
RADEON_USAGE_READ, RADEON_PRIO_CONST_BUFFER));
                }
 
-               radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
-               radeon_emit(cs, radeon_add_to_buffer_list(&rctx->b, 
&rctx->b.gfx, rbuffer,
-                                                     RADEON_USAGE_READ, 
RADEON_PRIO_CONST_BUFFER));
-
                radeon_emit(cs, PKT3(PKT3_SET_RESOURCE, 7, 0));
                radeon_emit(cs, (buffer_id_base + buffer_index) * 7);
                radeon_emit(cs, offset); /* RESOURCEi_WORD0 */
-- 
2.12.3

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