From: Ian Romanick <ian.d.roman...@intel.com>
Let the lowering in NIR handle it instead.
This hurts one shader that occurs twice in shader-db (SynMark GSCloth)
on IVB and HSW. No other shaders or platforms were affected.
total cycles in shared programs: 253438422 -> 253438426 (0.00%)
cycles in affected programs: 412 -> 416 (0.97%)
helped: 0
HURT: 2
Signed-off-by: Ian Romanick <ian.d.roman...@intel.com>
---
src/mesa/drivers/dri/i965/brw_context.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 19d5a2e..c690350 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -586,7 +586,6 @@ brw_initialize_context_constants(struct brw_context *brw)
ctx->Const.QuadsFollowProvokingVertexConvention = false;
ctx->Const.NativeIntegers = true;
- ctx->Const.VertexID_is_zero_based = true;
/* Regarding the CMP instruction, the Ivybridge PRM says:
*
--
2.9.5
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