On 22/10/17 09:57, Bas Nieuwenhuizen wrote:
Due to LLVM bugs. Fixes a bunch of dEQP-VK.glsl.indexing.*
tests.
---
src/amd/vulkan/radv_shader.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/amd/vulkan/radv_shader.c b/src/amd/vulkan/radv_shader.c
index e572f693203..07e68d6032b 100644
--- a/src/amd/vulkan/radv_shader.c
+++ b/src/amd/vulkan/radv_shader.c
@@ -264,6 +264,11 @@ radv_shader_compile_to_nir(struct radv_device *device,
!llvm_has_working_vgpr_indexing)) {
indirect_mask |= nir_var_shader_in;
}
+ if (!llvm_has_working_vgpr_indexing &&
+ (nir->info.stage == MESA_SHADER_VERTEX ||
+ nir->info.stage == MESA_SHADER_TESS_EVAL ||
+ nir->info.stage == MESA_SHADER_FRAGMENT))
+ indirect_mask |= nir_var_shader_out;
radeonsi doesn't support indirects for geom outputs either.
Maybe just:
if (!llvm_has_working_vgpr_indexing &&
!nir->info.stage == MESA_SHADER_TESS_CTRL)
indirect_mask |= nir_var_shader_out;
If you agree feel few to add:
Reviewed-by: Timothy Arceri <tarc...@itsqueeze.com>
/* TODO: We shouldn't need to do this, however LLVM isn't currently
* smart enough to handle indirects without causing excess spilling
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