They return a boolean so this is the right type. Unfortunately,
get_nir_dest has the annoying behavior of giving us a float type by
default. This is mostly to work around the fact that gen7 has 64-bit
float but no Q types.
Cc: mesa-sta...@lists.freedesktop.org
---
src/intel/compiler/brw_fs_nir.cpp | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/intel/compiler/brw_fs_nir.cpp
b/src/intel/compiler/brw_fs_nir.cpp
index ffb2d6a..3d9edf7 100644
--- a/src/intel/compiler/brw_fs_nir.cpp
+++ b/src/intel/compiler/brw_fs_nir.cpp
@@ -4154,6 +4154,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld,
nir_intrinsic_instr *instr
ubld.MOV(brw_flag_reg(0, 0), brw_imm_uw(0));
}
bld.CMP(bld.null_reg_d(), get_nir_src(instr->src[0]), brw_imm_d(0),
BRW_CONDITIONAL_NZ);
+
+ dest.type = BRW_REGISTER_TYPE_D;
bld.MOV(dest, brw_imm_d(-1));
set_predicate(dispatch_width == 8 ? BRW_PREDICATE_ALIGN1_ANY8H :
dispatch_width == 16 ? BRW_PREDICATE_ALIGN1_ANY16H :
@@ -4176,6 +4178,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld,
nir_intrinsic_instr *instr
ubld.MOV(brw_flag_reg(0, 0), brw_imm_uw(0xffff));
}
bld.CMP(bld.null_reg_d(), get_nir_src(instr->src[0]), brw_imm_d(0),
BRW_CONDITIONAL_NZ);
+
+ dest.type = BRW_REGISTER_TYPE_D;
bld.MOV(dest, brw_imm_d(-1));
set_predicate(dispatch_width == 8 ? BRW_PREDICATE_ALIGN1_ALL8H :
dispatch_width == 16 ? BRW_PREDICATE_ALIGN1_ALL16H :
@@ -4200,6 +4204,8 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld,
nir_intrinsic_instr *instr
ubld.MOV(brw_flag_reg(0, 0), brw_imm_uw(0xffff));
}
bld.CMP(bld.null_reg_d(), value, uniformized, BRW_CONDITIONAL_Z);
+
+ dest.type = BRW_REGISTER_TYPE_D;
bld.MOV(dest, brw_imm_d(-1));
set_predicate(dispatch_width == 8 ? BRW_PREDICATE_ALIGN1_ALL8H :
dispatch_width == 16 ? BRW_PREDICATE_ALIGN1_ALL16H :
--
2.5.0.400.gff86faf
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