From: Jason Ekstrand <jason.ekstr...@intel.com>
Framebuffer access includes framebuffer reads so we need to invalidate
the texture cache. We do not, however, need to flush the depth cache
because you cannot do bind a depth texture as an image.
---
src/mesa/drivers/dri/i965/brw_program.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_program.c
b/src/mesa/drivers/dri/i965/brw_program.c
index 0b2622a2320..82d38f12f67 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -274,7 +274,7 @@ brw_memory_barrier(struct gl_context *ctx, GLbitfield
barriers)
PIPE_CONTROL_RENDER_TARGET_FLUSH);
if (barriers & GL_FRAMEBUFFER_BARRIER_BIT)
- bits |= (PIPE_CONTROL_DEPTH_CACHE_FLUSH |
+ bits |= (PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
PIPE_CONTROL_RENDER_TARGET_FLUSH);
/* Typed surface messages are handled by the render cache on IVB, so we
--
2.14.2
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