From: Nicolai Hähnle <nicolai.haeh...@amd.com>
gl_SampleMaskIn is supposed to contain set bits only for the samples that
are covered by the current fragment shader invocation, but the VGPR
initialization hardware loads the set of all bits that are covered at the
current pixel.
Fixes various tests in
dEQP-GLES31.functional.shaders.sample_variables.sample_mask_in.*
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/radeonsi/si_shader.c | 70 +++++++++++++++++++++++--
src/gallium/drivers/radeonsi/si_shader.h | 5 +-
src/gallium/drivers/radeonsi/si_state_shaders.c | 6 +++
3 files changed, 76 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index e7888e6012b..85de2e407b4 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -91,24 +91,24 @@ static void si_dump_shader_key(unsigned processor, const
struct si_shader *shade
static void si_build_vs_prolog_function(struct si_shader_context *ctx,
union si_shader_part_key *key);
static void si_build_tcs_epilog_function(struct si_shader_context *ctx,
union si_shader_part_key *key);
static void si_build_ps_prolog_function(struct si_shader_context *ctx,
union si_shader_part_key *key);
static void si_build_ps_epilog_function(struct si_shader_context *ctx,
union si_shader_part_key *key);
-/* Ideally pass the sample mask input to the PS epilog as v13, which
+/* Ideally pass the sample mask input to the PS epilog as v14, which
* is its usual location, so that the shader doesn't have to add v_mov.
*/
-#define PS_EPILOG_SAMPLEMASK_MIN_LOC 13
+#define PS_EPILOG_SAMPLEMASK_MIN_LOC 14
enum {
CONST_ADDR_SPACE = 2,
LOCAL_ADDR_SPACE = 3,
};
static bool is_merged_shader(struct si_shader *shader)
{
if (shader->selector->screen->b.chip_class <= VI)
return false;
@@ -4507,20 +4507,21 @@ static void create_function(struct si_shader_context
*ctx)
&ctx->abi.frag_pos[1],
SI_PARAM_POS_Y_FLOAT);
add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->f32,
&ctx->abi.frag_pos[2],
SI_PARAM_POS_Z_FLOAT);
add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->f32,
&ctx->abi.frag_pos[3],
SI_PARAM_POS_W_FLOAT);
add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->i32,
&ctx->abi.front_face,
SI_PARAM_FRONT_FACE);
shader->info.face_vgpr_index = 20;
add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->i32,
&ctx->abi.ancillary, SI_PARAM_ANCILLARY);
+ shader->info.ancillary_vgpr_index = 21;
add_arg_assign_checked(&fninfo, ARG_VGPR, ctx->f32,
&ctx->abi.sample_coverage,
SI_PARAM_SAMPLE_COVERAGE);
add_arg_checked(&fninfo, ARG_VGPR, ctx->i32,
SI_PARAM_POS_FIXED_PT);
/* Color inputs from the prolog. */
if (shader->selector->info.colors_read) {
unsigned num_color_elements =
util_bitcount(shader->selector->info.colors_read);
assert(fninfo.num_params + num_color_elements <=
ARRAY_SIZE(fninfo.types));
@@ -4578,20 +4579,21 @@ static void create_function(struct si_shader_context
*ctx)
ctx->separate_prolog) {
si_llvm_add_attribute(ctx->main_fn,
"InitialPSInputAddr",
S_0286D0_PERSP_SAMPLE_ENA(1) |
S_0286D0_PERSP_CENTER_ENA(1) |
S_0286D0_PERSP_CENTROID_ENA(1) |
S_0286D0_LINEAR_SAMPLE_ENA(1) |
S_0286D0_LINEAR_CENTER_ENA(1) |
S_0286D0_LINEAR_CENTROID_ENA(1) |
S_0286D0_FRONT_FACE_ENA(1) |
+ S_0286D0_ANCILLARY_ENA(1) |
S_0286D0_POS_FIXED_PT_ENA(1));
}
shader->info.num_input_sgprs = 0;
shader->info.num_input_vgprs = 0;
for (i = 0; i < fninfo.num_sgpr_params; ++i)
shader->info.num_input_sgprs +=
ac_get_type_size(fninfo.types[i]) / 4;
for (; i < fninfo.num_params; ++i)
@@ -5776,20 +5778,21 @@ static void si_get_ps_prolog_key(struct si_shader
*shader,
key->ps_prolog.num_input_sgprs = shader->info.num_input_sgprs;
key->ps_prolog.num_input_vgprs = shader->info.num_input_vgprs;
key->ps_prolog.wqm = info->uses_derivatives &&
(key->ps_prolog.colors_read ||
key->ps_prolog.states.force_persp_sample_interp ||
key->ps_prolog.states.force_linear_sample_interp ||
key->ps_prolog.states.force_persp_center_interp ||
key->ps_prolog.states.force_linear_center_interp ||
key->ps_prolog.states.bc_optimize_for_persp ||
key->ps_prolog.states.bc_optimize_for_linear);
+ key->ps_prolog.ancillary_vgpr_index = shader->info.ancillary_vgpr_index;
if (info->colors_read) {
unsigned *color = shader->selector->color_attr_index;
if (shader->key.part.ps.prolog.color_two_side) {
/* BCOLORs are stored after the last input. */
key->ps_prolog.num_interp_inputs = info->num_inputs;
key->ps_prolog.face_vgpr_index =
shader->info.face_vgpr_index;
shader->config.spi_ps_input_ena |=
S_0286CC_FRONT_FACE_ENA(1);
}
@@ -5885,21 +5888,22 @@ static void si_get_ps_prolog_key(struct si_shader
*shader,
*/
static bool si_need_ps_prolog(const union si_shader_part_key *key)
{
return key->ps_prolog.colors_read ||
key->ps_prolog.states.force_persp_sample_interp ||
key->ps_prolog.states.force_linear_sample_interp ||
key->ps_prolog.states.force_persp_center_interp ||
key->ps_prolog.states.force_linear_center_interp ||
key->ps_prolog.states.bc_optimize_for_persp ||
key->ps_prolog.states.bc_optimize_for_linear ||
- key->ps_prolog.states.poly_stipple;
+ key->ps_prolog.states.poly_stipple ||
+ key->ps_prolog.states.samplemask_log_ps_iter;
}
/**
* Compute the PS epilog key, which contains all the information needed to
* build the PS epilog function.
*/
static void si_get_ps_epilog_key(struct si_shader *shader,
union si_shader_part_key *key)
{
struct tgsi_shader_info *info = &shader->selector->info;
@@ -6529,20 +6533,21 @@ int si_compile_tgsi_shader(struct si_screen *sscreen,
}
/* Add the scratch offset to input SGPRs. */
if (shader->config.scratch_bytes_per_wave && !is_merged_shader(shader))
shader->info.num_input_sgprs += 1; /* scratch byte offset */
/* Calculate the number of fragment input VGPRs. */
if (ctx.type == PIPE_SHADER_FRAGMENT) {
shader->info.num_input_vgprs = 0;
shader->info.face_vgpr_index = -1;
+ shader->info.ancillary_vgpr_index = -1;
if (G_0286CC_PERSP_SAMPLE_ENA(shader->config.spi_ps_input_addr))
shader->info.num_input_vgprs += 2;
if (G_0286CC_PERSP_CENTER_ENA(shader->config.spi_ps_input_addr))
shader->info.num_input_vgprs += 2;
if
(G_0286CC_PERSP_CENTROID_ENA(shader->config.spi_ps_input_addr))
shader->info.num_input_vgprs += 2;
if
(G_0286CC_PERSP_PULL_MODEL_ENA(shader->config.spi_ps_input_addr))
shader->info.num_input_vgprs += 3;
if
(G_0286CC_LINEAR_SAMPLE_ENA(shader->config.spi_ps_input_addr))
@@ -6558,22 +6563,24 @@ int si_compile_tgsi_shader(struct si_screen *sscreen,
if (G_0286CC_POS_Y_FLOAT_ENA(shader->config.spi_ps_input_addr))
shader->info.num_input_vgprs += 1;
if (G_0286CC_POS_Z_FLOAT_ENA(shader->config.spi_ps_input_addr))
shader->info.num_input_vgprs += 1;
if (G_0286CC_POS_W_FLOAT_ENA(shader->config.spi_ps_input_addr))
shader->info.num_input_vgprs += 1;
if (G_0286CC_FRONT_FACE_ENA(shader->config.spi_ps_input_addr)) {
shader->info.face_vgpr_index =
shader->info.num_input_vgprs;
shader->info.num_input_vgprs += 1;
}
- if (G_0286CC_ANCILLARY_ENA(shader->config.spi_ps_input_addr))
+ if (G_0286CC_ANCILLARY_ENA(shader->config.spi_ps_input_addr)) {
+ shader->info.ancillary_vgpr_index =
shader->info.num_input_vgprs;
shader->info.num_input_vgprs += 1;
+ }
if
(G_0286CC_SAMPLE_COVERAGE_ENA(shader->config.spi_ps_input_addr))
shader->info.num_input_vgprs += 1;
if (G_0286CC_POS_FIXED_PT_ENA(shader->config.spi_ps_input_addr))
shader->info.num_input_vgprs += 1;
}
return 0;
}
/**
@@ -7223,20 +7230,68 @@ static void si_build_ps_prolog_function(struct
si_shader_context *ctx,
key->ps_prolog.colors_read, interp_ij,
prim_mask, face, color);
while (writemask) {
unsigned chan = u_bit_scan(&writemask);
ret = LLVMBuildInsertValue(gallivm->builder, ret,
color[chan],
fninfo.num_params +
color_out_idx++, "");
}
}
+ /* Section 15.2.2 (Shader Inputs) of the OpenGL 4.5 (Core Profile) spec
+ * says:
+ *
+ * "When per-sample shading is active due to the use of a fragment
+ * input qualified by sample or due to the use of the gl_SampleID
+ * or gl_SamplePosition variables, only the bit for the current
+ * sample is set in gl_SampleMaskIn. When state specifies multiple
+ * fragment shader invocations for a given fragment, the sample
+ * mask for any single fragment shader invocation may specify a
+ * subset of the covered samples for the fragment. In this case,
+ * the bit corresponding to each covered sample will be set in
+ * exactly one fragment shader invocation."
+ *
+ * The samplemask loaded by hardware is always the coverage of the
+ * entire pixel/fragment, so mask bits out based on the sample ID.
+ */
+ if (key->ps_prolog.states.samplemask_log_ps_iter) {
+ /* The bit pattern matches that used by fixed function fragment
+ * processing. */
+ static const uint16_t ps_iter_masks[] = {
+ 0xffff, /* not used */
+ 0x5555,
+ 0x1111,
+ 0x0101,
+ 0x0001,
+ };
+ assert(key->ps_prolog.states.samplemask_log_ps_iter <
ARRAY_SIZE(ps_iter_masks));
+
+ uint32_t ps_iter_mask =
ps_iter_masks[key->ps_prolog.states.samplemask_log_ps_iter];
+ unsigned ancillary_vgpr = key->ps_prolog.num_input_sgprs +
+ key->ps_prolog.ancillary_vgpr_index;
+ LLVMValueRef sampleid = unpack_param(ctx, ancillary_vgpr, 8, 4);
+ LLVMValueRef samplemask = LLVMGetParam(func, ancillary_vgpr +
1);
+
+ samplemask = LLVMBuildBitCast(gallivm->builder, samplemask,
ctx->i32, "");
+ samplemask = LLVMBuildAnd(
+ gallivm->builder,
+ samplemask,
+ LLVMBuildShl(gallivm->builder,
+ LLVMConstInt(ctx->i32, ps_iter_mask,
false),
+ sampleid, ""),
+ "");
+ samplemask = LLVMBuildBitCast(gallivm->builder, samplemask,
ctx->f32, "");
+
+ ret = LLVMBuildInsertValue(gallivm->builder, ret, samplemask,
+ ancillary_vgpr + 1, "");
+ }
+
/* Tell LLVM to insert WQM instruction sequence when needed. */
if (key->ps_prolog.wqm) {
LLVMAddTargetDependentFunctionAttr(func,
"amdgpu-ps-wqm-outputs", "");
}
si_llvm_build_ret(ctx, ret);
}
/**
@@ -7419,20 +7474,26 @@ static bool si_shader_select_ps_parts(struct si_screen
*sscreen,
shader->config.spi_ps_input_ena |= S_0286CC_PERSP_CENTER_ENA(1);
assert(G_0286CC_PERSP_CENTER_ENA(shader->config.spi_ps_input_addr));
}
/* At least one pair of interpolation weights must be enabled. */
if (!(shader->config.spi_ps_input_ena & 0x7f)) {
shader->config.spi_ps_input_ena |=
S_0286CC_LINEAR_CENTER_ENA(1);
assert(G_0286CC_LINEAR_CENTER_ENA(shader->config.spi_ps_input_addr));
}
+ /* Samplemask fixup requires the sample ID. */
+ if (shader->key.part.ps.prolog.samplemask_log_ps_iter) {
+ shader->config.spi_ps_input_ena |= S_0286CC_ANCILLARY_ENA(1);
+
assert(G_0286CC_ANCILLARY_ENA(shader->config.spi_ps_input_addr));
+ }
+
/* The sample mask input is always enabled, because the API shader
always
* passes it through to the epilog. Disable it here if it's unused.
*/
if (!shader->key.part.ps.epilog.poly_line_smoothing &&
!shader->selector->info.reads_samplemask)
shader->config.spi_ps_input_ena &= C_0286CC_SAMPLE_COVERAGE_ENA;
return true;
}
@@ -7503,20 +7564,21 @@ int si_shader_create(struct si_screen *sscreen,
LLVMTargetMachineRef tm,
if (!mainp)
return -1;
/* Copy the compiled TGSI shader data over. */
shader->is_binary_shared = true;
shader->binary = mainp->binary;
shader->config = mainp->config;
shader->info.num_input_sgprs = mainp->info.num_input_sgprs;
shader->info.num_input_vgprs = mainp->info.num_input_vgprs;
shader->info.face_vgpr_index = mainp->info.face_vgpr_index;
+ shader->info.ancillary_vgpr_index =
mainp->info.ancillary_vgpr_index;
memcpy(shader->info.vs_output_param_offset,
mainp->info.vs_output_param_offset,
sizeof(mainp->info.vs_output_param_offset));
shader->info.uses_instanceid = mainp->info.uses_instanceid;
shader->info.nr_pos_exports = mainp->info.nr_pos_exports;
shader->info.nr_param_exports = mainp->info.nr_param_exports;
/* Select prologs and/or epilogs. */
switch (sel->type) {
case PIPE_SHADER_VERTEX:
diff --git a/src/gallium/drivers/radeonsi/si_shader.h
b/src/gallium/drivers/radeonsi/si_shader.h
index ee6b0c167f9..be17cf462be 100644
--- a/src/gallium/drivers/radeonsi/si_shader.h
+++ b/src/gallium/drivers/radeonsi/si_shader.h
@@ -415,20 +415,21 @@ struct si_gs_prolog_bits {
struct si_ps_prolog_bits {
unsigned color_two_side:1;
unsigned flatshade_colors:1;
unsigned poly_stipple:1;
unsigned force_persp_sample_interp:1;
unsigned force_linear_sample_interp:1;
unsigned force_persp_center_interp:1;
unsigned force_linear_center_interp:1;
unsigned bc_optimize_for_persp:1;
unsigned bc_optimize_for_linear:1;
+ unsigned samplemask_log_ps_iter:3;
};
/* Common PS bits between the shader key and the epilog key. */
struct si_ps_epilog_bits {
unsigned spi_shader_col_format;
unsigned color_is_int8:8;
unsigned color_is_int10:8;
unsigned last_cbuf:3;
unsigned alpha_func:3;
unsigned alpha_to_one:1;
@@ -456,20 +457,21 @@ union si_shader_part_key {
unsigned is_monolithic:1;
} gs_prolog;
struct {
struct si_ps_prolog_bits states;
unsigned num_input_sgprs:6;
unsigned num_input_vgprs:5;
/* Color interpolation and two-side color selection. */
unsigned colors_read:8; /* color input components read */
unsigned num_interp_inputs:5; /* BCOLOR is at this
location */
unsigned face_vgpr_index:5;
+ unsigned ancillary_vgpr_index:5;
unsigned wqm:1;
char color_attr_index[2];
char color_interp_vgpr_index[2]; /* -1 == constant */
} ps_prolog;
struct {
struct si_ps_epilog_bits states;
unsigned colors_written:8;
unsigned writes_z:1;
unsigned writes_stencil:1;
unsigned writes_samplemask:1;
@@ -548,21 +550,22 @@ struct si_shader_config {
unsigned scratch_bytes_per_wave;
unsigned rsrc1;
unsigned rsrc2;
};
/* GCN-specific shader info. */
struct si_shader_info {
ubyte vs_output_param_offset[SI_MAX_VS_OUTPUTS];
ubyte num_input_sgprs;
ubyte num_input_vgprs;
- char face_vgpr_index;
+ signed char face_vgpr_index;
+ signed char ancillary_vgpr_index;
bool uses_instanceid;
ubyte nr_pos_exports;
ubyte nr_param_exports;
};
struct si_shader {
struct si_compiler_ctx_state compiler_ctx_state;
struct si_shader_selector *selector;
struct si_shader_selector *previous_stage_sel; /* for refcounting
*/
diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c
b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 9f76551cfbb..6b63e69d91c 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1416,20 +1416,26 @@ static inline void si_shader_selector_key(struct
pipe_context *ctx,
key->part.ps.epilog.alpha_to_one =
sctx->queued.named.blend->alpha_to_one &&
rs->multisample_enable;
}
key->part.ps.prolog.poly_stipple =
rs->poly_stipple_enable && is_poly;
key->part.ps.epilog.poly_line_smoothing = ((is_poly &&
rs->poly_smooth) ||
(is_line &&
rs->line_smooth)) &&
sctx->framebuffer.nr_samples <= 1;
key->part.ps.epilog.clamp_color =
rs->clamp_fragment_color;
+ if (sctx->ps_iter_samples > 1 &&
+ sel->info.reads_samplemask) {
+ key->part.ps.prolog.samplemask_log_ps_iter =
+
util_logbase2(util_next_power_of_two(sctx->ps_iter_samples));
+ }
+
if (rs->force_persample_interp &&
rs->multisample_enable &&
sctx->framebuffer.nr_samples > 1 &&
sctx->ps_iter_samples > 1) {
key->part.ps.prolog.force_persp_sample_interp =
sel->info.uses_persp_center ||
sel->info.uses_persp_centroid;
key->part.ps.prolog.force_linear_sample_interp =
sel->info.uses_linear_center ||
--
2.11.0
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