From: Marek Olšák <marek.ol...@amd.com>

---
 src/gallium/drivers/radeonsi/si_blit.c | 27 +++++++++++++++------------
 1 file changed, 15 insertions(+), 12 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_blit.c 
b/src/gallium/drivers/radeonsi/si_blit.c
index 378441a..2544388 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -367,46 +367,49 @@ si_decompress_depth(struct si_context *sctx,
                        first_layer, last_layer,
                        0, u_max_sample(&tex->resource.b.b));
 
                if (copy_planes & PIPE_MASK_Z)
                        tex->dirty_level_mask &= ~fully_copied_levels;
                if (copy_planes & PIPE_MASK_S)
                        tex->stencil_dirty_level_mask &= ~fully_copied_levels;
        }
 
        if (inplace_planes) {
+               bool has_htile = r600_htile_enabled(tex, first_level);
                bool tc_compat_htile = vi_tc_compat_htile_enabled(tex, 
first_level);
 
-               if (!tc_compat_htile) {
+               /* Don't decompress if there is no HTILE or when HTILE is
+                * TC-compatible. */
+               if (has_htile && !tc_compat_htile) {
                        si_blit_decompress_zs_in_place(
                                                sctx, tex,
                                                levels_z, levels_s,
                                                first_layer, last_layer);
+               } else {
+                       /* This is only a cache flush.
+                        *
+                        * Only clear the mask that we are flushing, because
+                        * si_make_DB_shader_coherent() treats different levels
+                        * and depth and stencil differently.
+                        */
+                       if (inplace_planes & PIPE_MASK_Z)
+                               tex->dirty_level_mask &= ~levels_z;
+                       if (inplace_planes & PIPE_MASK_S)
+                               tex->stencil_dirty_level_mask &= ~levels_s;
                }
 
                /* Only in-place decompression needs to flush DB caches, or
                 * when we don't decompress but TC-compatible planes are dirty.
                 */
                si_make_DB_shader_coherent(sctx, tex->resource.b.b.nr_samples,
                                           inplace_planes & PIPE_MASK_S,
                                           tc_compat_htile);
-
-               if (tc_compat_htile) {
-                       /* Only clear the mask that we are flushing, because
-                        * si_make_DB_shader_coherent() can treat depth and
-                        * stencil differently.
-                        */
-                       if (inplace_planes & PIPE_MASK_Z)
-                               tex->dirty_level_mask &= ~levels_z;
-                       if (inplace_planes & PIPE_MASK_S)
-                               tex->stencil_dirty_level_mask &= ~levels_s;
-               }
        }
        /* set_framebuffer_state takes care of coherency for single-sample.
         * The DB->CB copy uses CB for the final writes.
         */
        if (copy_planes && tex->resource.b.b.nr_samples > 1)
                si_make_CB_shader_coherent(sctx, tex->resource.b.b.nr_samples,
                                           false);
 }
 
 static void
-- 
2.7.4

_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev

Reply via email to