From: Marek Olšák <marek.ol...@amd.com> --- src/amd/common/ac_surface.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 68700f4..1eff4e5 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -707,26 +707,33 @@ static int gfx6_compute_surface(ADDR_HANDLE addrlib, surf->is_linear = surf->u.legacy.level[0].mode == RADEON_SURF_MODE_LINEAR_ALIGNED; /* Work out tile swizzle. */ if (config->info.surf_index && surf->u.legacy.level[0].mode == RADEON_SURF_MODE_2D && !(surf->flags & (RADEON_SURF_Z_OR_SBUFFER | RADEON_SURF_SHAREABLE)) && (config->info.samples > 1 || !(surf->flags & RADEON_SURF_SCANOUT))) { ADDR_COMPUTE_BASE_SWIZZLE_INPUT AddrBaseSwizzleIn = {0}; ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT AddrBaseSwizzleOut = {0}; + AddrBaseSwizzleIn.size = sizeof(ADDR_COMPUTE_BASE_SWIZZLE_INPUT); + AddrBaseSwizzleOut.size = sizeof(ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT); + AddrBaseSwizzleIn.surfIndex = p_atomic_inc_return(config->info.surf_index) - 1; AddrBaseSwizzleIn.tileIndex = AddrSurfInfoIn.tileIndex; AddrBaseSwizzleIn.macroModeIndex = AddrSurfInfoOut.macroModeIndex; AddrBaseSwizzleIn.pTileInfo = AddrSurfInfoOut.pTileInfo; AddrBaseSwizzleIn.tileMode = AddrSurfInfoOut.tileMode; - AddrComputeBaseSwizzle(addrlib, &AddrBaseSwizzleIn, &AddrBaseSwizzleOut); + + r = AddrComputeBaseSwizzle(addrlib, &AddrBaseSwizzleIn, + &AddrBaseSwizzleOut); + if (r != ADDR_OK) + return r; assert(AddrBaseSwizzleOut.tileSwizzle <= u_bit_consecutive(0, sizeof(surf->tile_swizzle) * 8)); surf->tile_swizzle = AddrBaseSwizzleOut.tileSwizzle; } return 0; } /* This is only called when expecting a tiled layout. */ static int -- 2.7.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev