Nicolai, this depends on: https://cgit.freedesktop.org/mesa/mesa/commit/src/mesa?id=944455217b67cb524efef9e628baf09416db5524
Which didn't make it for -stable. Should we cherry-pick that too? On Mon, 2017-06-12 at 21:45 +0200, Nicolai Hähnle wrote: > From: Nicolai Hähnle <nicolai.haeh...@amd.com> > > This fixes a bug when lowering ballotARB: previously, using writemask 0xf, > emit_asm would create TGSI_OPCODE_BALLOT instructions that span two registers > to cover 4 64-bit channels. This could trample over other a neighbouring > temporary. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101360 > Cc: 17.1 <mesa-sta...@lists.freedesktop.org> > --- > src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > index c5d2e0f..cb86392 100644 > --- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > +++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp > @@ -3906,20 +3906,22 @@ glsl_to_tgsi_visitor::visit_image_intrinsic(ir_call > *ir) > if (imgvar->data.memory_volatile) > inst->buffer_access |= TGSI_MEMORY_VOLATILE; > } > > void > glsl_to_tgsi_visitor::visit_generic_intrinsic(ir_call *ir, unsigned op) > { > ir->return_deref->accept(this); > st_dst_reg dst = st_dst_reg(this->result); > > + dst.writemask = u_bit_consecutive(0, > ir->return_deref->var->type->vector_elements); > + > st_src_reg src[4] = { undef_src, undef_src, undef_src, undef_src }; > unsigned num_src = 0; > foreach_in_list(ir_rvalue, param, &ir->actual_parameters) { > assert(num_src < ARRAY_SIZE(src)); > > this->result.file = PROGRAM_UNDEFINED; > param->accept(this); > assert(this->result.file != PROGRAM_UNDEFINED); > > src[num_src] = this->result; -- Br, Andres _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
