Instead of always doing a full resolve, only resolve the bits that are
needed. This means that we only do a partial resolve when the miptree
modifier is I915_FORMAT_MOD_Y_TILED_CCS.
---
src/mesa/drivers/dri/i965/brw_context.c | 2 +-
src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 37 +++++++++++++++++++++++++++
src/mesa/drivers/dri/i965/intel_mipmap_tree.h | 9 +++++++
3 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_context.c
b/src/mesa/drivers/dri/i965/brw_context.c
index 15d66ee..5b13c66 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -1324,7 +1324,7 @@ intel_resolve_for_dri2_flush(struct brw_context *brw,
if (rb->mt->num_samples <= 1) {
assert(rb->mt_layer == 0 && rb->mt_level == 0 &&
rb->layer_count == 1);
- intel_miptree_prepare_access(brw, rb->mt, 0, 1, 0, 1, false, false);
+ intel_miptree_prepare_external(brw, rb->mt);
} else {
intel_renderbuffer_downsample(brw, rb);
}
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 62a9e5f..6fde981 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -48,6 +48,10 @@
#define FILE_DEBUG_FLAG DEBUG_MIPTREE
+#ifndef DRM_FORMAT_MOD_INVALID
+#define DRM_FORMAT_MOD_INVALID ((1ULL<<56) - 1)
+#endif
+
static void *intel_miptree_map_raw(struct brw_context *brw,
struct intel_mipmap_tree *mt,
GLbitfield mode);
@@ -344,6 +348,7 @@ intel_miptree_create_layout(struct brw_context *brw,
mt->logical_height0 = height0;
mt->logical_depth0 = depth0;
mt->is_scanout = (layout_flags & MIPTREE_LAYOUT_FOR_SCANOUT) != 0;
+ mt->drm_modifier = DRM_FORMAT_MOD_INVALID;
mt->aux_usage = ISL_AUX_USAGE_NONE;
mt->supports_fast_clear = false;
mt->aux_state = NULL;
@@ -888,6 +893,8 @@ miptree_create_for_planar_image(struct brw_context *brw,
planar_mt->plane[i - 1] = mt;
}
+ planar_mt->drm_modifier = image->modifier;
+
return planar_mt;
}
@@ -1005,6 +1012,7 @@ intel_miptree_create_for_dri_image(struct brw_context
*brw,
mt->level[0].slice[0].y_offset = image->tile_y;
mt->total_width += image->tile_x;
mt->total_height += image->tile_y;
+ mt->drm_modifier = image->modifier;
/* From "OES_EGL_image" error reporting. We report GL_INVALID_OPERATION
* for EGL images from non-tile aligned sufaces in gen4 hw and earlier
which has
@@ -2828,6 +2836,35 @@ intel_miptree_finish_depth(struct brw_context *brw,
}
}
+void
+intel_miptree_prepare_external(struct brw_context *brw,
+ struct intel_mipmap_tree *mt)
+{
+ bool supports_aux = false, supports_fast_clear = false;
+
+ const struct isl_drm_modifier_info *mod_info =
+ isl_drm_modifier_get_info(mt->drm_modifier);
+
+ if (mod_info && mod_info->aux_usage != ISL_AUX_USAGE_NONE) {
+ /* CCS_E is the only supported aux for external images and it's only
+ * supported on very simple images.
+ */
+ assert(mod_info->aux_usage == ISL_AUX_USAGE_CCS_E);
+ assert(_mesa_is_format_color_format(mt->format));
+ assert(mt->first_level == mt->last_level);
+ assert(mt->logical_depth0 == 1);
+ assert(mt->num_samples <= 1);
+ assert(mt->mcs_buf != NULL);
+
+ supports_aux = true;
+ supports_fast_clear = mod_info->supports_clear_color;
+ }
+
+ intel_miptree_prepare_access(brw, mt, 0, INTEL_REMAINING_LEVELS,
+ 0, INTEL_REMAINING_LAYERS,
+ supports_aux, supports_fast_clear);
+}
+
/**
* Make it possible to share the BO backing the given miptree with another
* process or another miptree.
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 2a4cda2..8dd3a5d 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -646,6 +646,12 @@ struct intel_mipmap_tree
*/
bool is_scanout;
+ /**
+ * For external surfaces, this is DRM format modifier that was used to
+ * create or import the surface.
+ */
+ uint64_t drm_modifier;
+
/* These are also refcounted:
*/
GLuint refcount;
@@ -970,6 +976,9 @@ intel_miptree_finish_depth(struct brw_context *brw,
struct intel_mipmap_tree *mt, uint32_t level,
uint32_t start_layer, uint32_t layer_count,
bool depth_written);
+void
+intel_miptree_prepare_external(struct brw_context *brw,
+ struct intel_mipmap_tree *mt);
void
intel_miptree_make_shareable(struct brw_context *brw,
--
2.5.0.400.gff86faf
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