On Fri, Jun 9, 2017 at 4:00 PM, Samuel Pitoiset
<samuel.pitoi...@gmail.com> wrote:
>
>
> On 06/09/2017 03:49 PM, Marek Olšák wrote:
>>
>> From: Marek Olšák <marek.ol...@amd.com>
>>
>> ---
>> src/gallium/drivers/radeonsi/si_state.c | 3 ++-
>> 1 file changed, 2 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/gallium/drivers/radeonsi/si_state.c
>> b/src/gallium/drivers/radeonsi/si_state.c
>> index 53f66ac..a8255f2 100644
>> --- a/src/gallium/drivers/radeonsi/si_state.c
>> +++ b/src/gallium/drivers/radeonsi/si_state.c
>> @@ -1078,21 +1078,22 @@ static void *si_create_dsa_state(struct
>> pipe_context *ctx,
>> if (state->alpha.enabled) {
>> dsa->alpha_func = state->alpha.func;
>> si_pm4_set_reg(pm4, R_00B030_SPI_SHADER_USER_DATA_PS_0 +
>> SI_SGPR_ALPHA_REF * 4,
>> fui(state->alpha.ref_value));
>> } else {
>> dsa->alpha_func = PIPE_FUNC_ALWAYS;
>> }
>> si_pm4_set_reg(pm4, R_028800_DB_DEPTH_CONTROL, db_depth_control);
>> - si_pm4_set_reg(pm4, R_02842C_DB_STENCIL_CONTROL,
>> db_stencil_control);
>> + if (state->stencil[0].enabled)
>> + si_pm4_set_reg(pm4, R_02842C_DB_STENCIL_CONTROL,
>> db_stencil_control);
>
>
> How if stencil is enabled, then disabled? Doesn't this reg has to be set to
> 0?
DB_DEPTH_CONTROL enables and disables stencil.
Marek
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