Hello Lucas,
On Thu, Jun 08, 2017 at 10:26:04AM +0200, Lucas Stach wrote:
> Hi Wladimir,
>
> did you also review this patch? It's the last one of this series missing
> review.
Sorry, no, I missed it somehow.
Looks obviously correct to me, and matches the code from VC4 (apart from the
coherent which you mention), so
Reviewed-By: Wladimir J. van der Laan <laa...@gmail.com>
> Am Freitag, den 19.05.2017, 11:41 +0200 schrieb Lucas Stach:
> > Stolen from VC4. As we don't do any fancy reallocation tricks yet, it's
> > possible to upgrade also coherent mappings and shared resources.
> >
> > Signed-off-by: Lucas Stach <l.st...@pengutronix.de>
> > ---
> > src/gallium/drivers/etnaviv/etnaviv_transfer.c | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/src/gallium/drivers/etnaviv/etnaviv_transfer.c
> > b/src/gallium/drivers/etnaviv/etnaviv_transfer.c
> > index 05cdbc599956..fe57aa4d17b2 100644
> > --- a/src/gallium/drivers/etnaviv/etnaviv_transfer.c
> > +++ b/src/gallium/drivers/etnaviv/etnaviv_transfer.c
> > @@ -148,6 +148,20 @@ etna_transfer_map(struct pipe_context *pctx, struct
> > pipe_resource *prsc,
> >
> > assert(level <= prsc->last_level);
> >
> > + /* Upgrade DISCARD_RANGE to WHOLE_RESOURCE if the whole resource is
> > + * being mapped. If we add buffer reallocation to avoid CPU/GPU sync
> > this
> > + * check needs to be extended to coherent mappings and shared resources.
> > + */
> > + if ((usage & PIPE_TRANSFER_DISCARD_RANGE) &&
> > + !(usage & PIPE_TRANSFER_UNSYNCHRONIZED) &&
> > + prsc->last_level == 0 &&
> > + prsc->width0 == box->width &&
> > + prsc->height0 == box->height &&
> > + prsc->depth0 == box->depth &&
> > + prsc->array_size == 1) {
> > + usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
> > + }
> > +
> > if (rsc->texture && !etna_resource_newer(rsc,
> > etna_resource(rsc->texture))) {
> > /* We have a texture resource which is the same age or newer than the
> > * render resource. Use the texture resource, which avoids bouncing
>
>
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