From: Marek Olšák <marek.ol...@amd.com>

---
 src/gallium/drivers/radeonsi/si_descriptors.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c 
b/src/gallium/drivers/radeonsi/si_descriptors.c
index 7a2b71d..6955b9d 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -552,21 +552,21 @@ static void si_set_sampler_view(struct si_context *sctx,
                        memcpy(desc + 12,
                               views->sampler_states[slot]->val, 4*4);
 
                views->enabled_mask &= ~(1u << slot);
        }
 
        descs->dirty_mask |= 1ull << desc_slot;
        sctx->descriptors_dirty |= 1u << 
si_sampler_and_image_descriptors_idx(shader);
 }
 
-static bool is_compressed_colortex(struct r600_texture *rtex)
+static bool color_needs_decompression(struct r600_texture *rtex)
 {
        return rtex->fmask.size ||
               (rtex->dirty_level_mask &&
                (rtex->cmask.size || rtex->dcc_offset));
 }
 
 static bool depth_needs_decompression(struct r600_texture *rtex,
                                      struct si_sampler_view *sview)
 {
        return rtex->db_compatible &&
@@ -615,21 +615,21 @@ static void si_set_sampler_views(struct pipe_context *ctx,
                if (views[i]->texture && views[i]->texture->target != 
PIPE_BUFFER) {
                        struct r600_texture *rtex =
                                (struct r600_texture*)views[i]->texture;
                        struct si_sampler_view *rview = (struct si_sampler_view 
*)views[i];
 
                        if (depth_needs_decompression(rtex, rview)) {
                                samplers->depth_texture_mask |= 1u << slot;
                        } else {
                                samplers->depth_texture_mask &= ~(1u << slot);
                        }
-                       if (is_compressed_colortex(rtex)) {
+                       if (color_needs_decompression(rtex)) {
                                samplers->compressed_colortex_mask |= 1u << 
slot;
                        } else {
                                samplers->compressed_colortex_mask &= ~(1u << 
slot);
                        }
 
                        if (rtex->dcc_offset &&
                            p_atomic_read(&rtex->framebuffers_bound))
                                sctx->need_check_render_feedback = true;
                } else {
                        samplers->depth_texture_mask &= ~(1u << slot);
@@ -645,21 +645,21 @@ si_samplers_update_compressed_colortex_mask(struct 
si_textures_info *samplers)
 {
        unsigned mask = samplers->views.enabled_mask;
 
        while (mask) {
                int i = u_bit_scan(&mask);
                struct pipe_resource *res = samplers->views.views[i]->texture;
 
                if (res && res->target != PIPE_BUFFER) {
                        struct r600_texture *rtex = (struct r600_texture *)res;
 
-                       if (is_compressed_colortex(rtex)) {
+                       if (color_needs_decompression(rtex)) {
                                samplers->compressed_colortex_mask |= 1u << i;
                        } else {
                                samplers->compressed_colortex_mask &= ~(1u << 
i);
                        }
                }
        }
 }
 
 /* IMAGE VIEWS */
 
@@ -774,21 +774,21 @@ static void si_set_shader_image(struct si_context *ctx,
                        /* If DCC can't be disabled, at least decompress it.
                         * The decompression is relatively cheap if the surface
                         * has been decompressed already.
                         */
                        if (r600_texture_disable_dcc(&ctx->b, tex))
                                uses_dcc = false;
                        else
                                ctx->b.decompress_dcc(&ctx->b.b, tex);
                }
 
-               if (is_compressed_colortex(tex)) {
+               if (color_needs_decompression(tex)) {
                        images->compressed_colortex_mask |= 1 << slot;
                } else {
                        images->compressed_colortex_mask &= ~(1 << slot);
                }
 
                if (uses_dcc &&
                    p_atomic_read(&tex->framebuffers_bound))
                        ctx->need_check_render_feedback = true;
 
                if (ctx->b.chip_class >= GFX9) {
@@ -869,21 +869,21 @@ si_images_update_compressed_colortex_mask(struct 
si_images_info *images)
 {
        unsigned mask = images->enabled_mask;
 
        while (mask) {
                int i = u_bit_scan(&mask);
                struct pipe_resource *res = images->views[i].resource;
 
                if (res && res->target != PIPE_BUFFER) {
                        struct r600_texture *rtex = (struct r600_texture *)res;
 
-                       if (is_compressed_colortex(rtex)) {
+                       if (color_needs_decompression(rtex)) {
                                images->compressed_colortex_mask |= 1 << i;
                        } else {
                                images->compressed_colortex_mask &= ~(1 << i);
                        }
                }
        }
 }
 
 /* SAMPLER STATES */
 
-- 
2.7.4

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