From: Marek Olšák <marek.ol...@amd.com>

This is more accurate.
---
 src/amd/common/ac_llvm_build.c                    |  8 ++++----
 src/amd/common/ac_llvm_build.h                    |  4 ++--
 src/gallium/drivers/radeonsi/si_shader.c          | 10 +++++-----
 src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c | 18 +++++++++---------
 4 files changed, 20 insertions(+), 20 deletions(-)

diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
index 87a1fb7..3df9f53 100644
--- a/src/amd/common/ac_llvm_build.c
+++ b/src/amd/common/ac_llvm_build.c
@@ -626,21 +626,21 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
 LLVMValueRef
 ac_build_buffer_load(struct ac_llvm_context *ctx,
                     LLVMValueRef rsrc,
                     int num_channels,
                     LLVMValueRef vindex,
                     LLVMValueRef voffset,
                     LLVMValueRef soffset,
                     unsigned inst_offset,
                     unsigned glc,
                     unsigned slc,
-                    bool readonly_memory)
+                    bool can_speculate)
 {
        unsigned func = CLAMP(num_channels, 1, 3) - 1;
 
        LLVMValueRef args[] = {
                LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
                vindex ? vindex : LLVMConstInt(ctx->i32, 0, 0),
                LLVMConstInt(ctx->i32, inst_offset, 0),
                LLVMConstInt(ctx->i1, glc, 0),
                LLVMConstInt(ctx->i1, slc, 0)
        };
@@ -660,45 +660,45 @@ ac_build_buffer_load(struct ac_llvm_context *ctx,
                                "");
        }
 
        snprintf(name, sizeof(name), "llvm.amdgcn.buffer.load.%s",
                 type_names[func]);
 
        return ac_build_intrinsic(ctx, name, types[func], args,
                                  ARRAY_SIZE(args),
                                  /* READNONE means writes can't affect it, 
while
                                   * READONLY means that writes can affect it. 
*/
-                                 readonly_memory && HAVE_LLVM >= 0x0400 ?
+                                 can_speculate && HAVE_LLVM >= 0x0400 ?
                                          AC_FUNC_ATTR_READNONE :
                                          AC_FUNC_ATTR_READONLY);
 }
 
 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
                                         LLVMValueRef rsrc,
                                         LLVMValueRef vindex,
                                         LLVMValueRef voffset,
-                                        bool readonly_memory)
+                                        bool can_speculate)
 {
        LLVMValueRef args [] = {
                LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""),
                vindex,
                voffset,
                LLVMConstInt(ctx->i1, 0, 0), /* glc */
                LLVMConstInt(ctx->i1, 0, 0), /* slc */
        };
 
        return ac_build_intrinsic(ctx,
                                  "llvm.amdgcn.buffer.load.format.v4f32",
                                  ctx->v4f32, args, ARRAY_SIZE(args),
                                  /* READNONE means writes can't affect it, 
while
                                   * READONLY means that writes can affect it. 
*/
-                                 readonly_memory && HAVE_LLVM >= 0x0400 ?
+                                 can_speculate && HAVE_LLVM >= 0x0400 ?
                                          AC_FUNC_ATTR_READNONE :
                                          AC_FUNC_ATTR_READONLY);
 }
 
 /**
  * Set range metadata on an instruction.  This can only be used on load and
  * call instructions.  If you know an instruction can only produce the values
  * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
  * \p lo is the minimum value inclusive.
  * \p hi is the maximum value exclusive.
diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
index 0ecbc4a..c1b5f3d 100644
--- a/src/amd/common/ac_llvm_build.h
+++ b/src/amd/common/ac_llvm_build.h
@@ -136,27 +136,27 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
 LLVMValueRef
 ac_build_buffer_load(struct ac_llvm_context *ctx,
                     LLVMValueRef rsrc,
                     int num_channels,
                     LLVMValueRef vindex,
                     LLVMValueRef voffset,
                     LLVMValueRef soffset,
                     unsigned inst_offset,
                     unsigned glc,
                     unsigned slc,
-                    bool readonly_memory);
+                    bool can_speculate);
 
 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
                                         LLVMValueRef rsrc,
                                         LLVMValueRef vindex,
                                         LLVMValueRef voffset,
-                                        bool readonly_memory);
+                                        bool can_speculate);
 
 LLVMValueRef
 ac_get_thread_id(struct ac_llvm_context *ctx);
 
 #define AC_TID_MASK_TOP_LEFT 0xfffffffc
 #define AC_TID_MASK_TOP      0xfffffffd
 #define AC_TID_MASK_LEFT     0xfffffffe
 
 LLVMValueRef
 ac_build_ddxy(struct ac_llvm_context *ctx,
diff --git a/src/gallium/drivers/radeonsi/si_shader.c 
b/src/gallium/drivers/radeonsi/si_shader.c
index 0ffe402..fe0cd4a 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -816,49 +816,49 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
                                   LLVMConstInt(ctx->i32, param_index_base, 0),
                                   "");
 
        return get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx),
                                          vertex_index, param_index);
 }
 
 static LLVMValueRef buffer_load(struct lp_build_tgsi_context *bld_base,
                                 enum tgsi_opcode_type type, unsigned swizzle,
                                 LLVMValueRef buffer, LLVMValueRef offset,
-                                LLVMValueRef base, bool readonly_memory)
+                                LLVMValueRef base, bool can_speculate)
 {
        struct si_shader_context *ctx = si_shader_context(bld_base);
        struct gallivm_state *gallivm = &ctx->gallivm;
        LLVMValueRef value, value2;
        LLVMTypeRef llvm_type = tgsi2llvmtype(bld_base, type);
        LLVMTypeRef vec_type = LLVMVectorType(llvm_type, 4);
 
        if (swizzle == ~0) {
                value = ac_build_buffer_load(&ctx->ac, buffer, 4, NULL, base, 
offset,
-                                            0, 1, 0, readonly_memory);
+                                            0, 1, 0, can_speculate);
 
                return LLVMBuildBitCast(gallivm->builder, value, vec_type, "");
        }
 
        if (!tgsi_type_is_64bit(type)) {
                value = ac_build_buffer_load(&ctx->ac, buffer, 4, NULL, base, 
offset,
-                                            0, 1, 0, readonly_memory);
+                                            0, 1, 0, can_speculate);
 
                value = LLVMBuildBitCast(gallivm->builder, value, vec_type, "");
                return LLVMBuildExtractElement(gallivm->builder, value,
                                    LLVMConstInt(ctx->i32, swizzle, 0), "");
        }
 
        value = ac_build_buffer_load(&ctx->ac, buffer, 1, NULL, base, offset,
-                                 swizzle * 4, 1, 0, readonly_memory);
+                                 swizzle * 4, 1, 0, can_speculate);
 
        value2 = ac_build_buffer_load(&ctx->ac, buffer, 1, NULL, base, offset,
-                                  swizzle * 4 + 4, 1, 0, readonly_memory);
+                                  swizzle * 4 + 4, 1, 0, can_speculate);
 
        return si_llvm_emit_fetch_64bit(bld_base, type, value, value2);
 }
 
 /**
  * Load from LDS.
  *
  * \param type         output value type
  * \param swizzle      offset (typically 0..3); it can be ~0, which loads a 
vec4
  * \param dw_addr      address in dwords
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c 
b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index bd8ecb7..e2be9e5 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -386,39 +386,39 @@ static void load_fetch_args(
                        emit_data->args[0] = coords;
                        emit_data->args[1] = rsrc;
                        emit_data->args[2] = LLVMConstInt(ctx->i32, 15, 0); /* 
dmask */
                        emit_data->arg_count = 3;
 
                        image_append_args(ctx, emit_data, target, false, false);
                }
        }
 }
 
-static unsigned get_load_intr_attribs(bool readonly_memory)
+static unsigned get_load_intr_attribs(bool can_speculate)
 {
        /* READNONE means writes can't affect it, while READONLY means that
         * writes can affect it. */
-       return readonly_memory && HAVE_LLVM >= 0x0400 ?
+       return can_speculate && HAVE_LLVM >= 0x0400 ?
                                 LP_FUNC_ATTR_READNONE :
                                 LP_FUNC_ATTR_READONLY;
 }
 
 static unsigned get_store_intr_attribs(bool writeonly_memory)
 {
        return writeonly_memory && HAVE_LLVM >= 0x0400 ?
                                  LP_FUNC_ATTR_INACCESSIBLE_MEM_ONLY :
                                  LP_FUNC_ATTR_WRITEONLY;
 }
 
 static void load_emit_buffer(struct si_shader_context *ctx,
                             struct lp_build_emit_data *emit_data,
-                            bool readonly_memory)
+                            bool can_speculate)
 {
        const struct tgsi_full_instruction *inst = emit_data->inst;
        struct gallivm_state *gallivm = &ctx->gallivm;
        LLVMBuilderRef builder = gallivm->builder;
        uint writemask = inst->Dst[0].Register.WriteMask;
        uint count = util_last_bit(writemask);
        const char *intrinsic_name;
        LLVMTypeRef dst_type;
 
        switch (count) {
@@ -432,21 +432,21 @@ static void load_emit_buffer(struct si_shader_context 
*ctx,
                break;
        default: // 3 & 4
                intrinsic_name = "llvm.amdgcn.buffer.load.v4f32";
                dst_type = ctx->v4f32;
                count = 4;
        }
 
        emit_data->output[emit_data->chan] = lp_build_intrinsic(
                        builder, intrinsic_name, dst_type,
                        emit_data->args, emit_data->arg_count,
-                       get_load_intr_attribs(readonly_memory));
+                       get_load_intr_attribs(can_speculate));
 }
 
 static LLVMValueRef get_memory_ptr(struct si_shader_context *ctx,
                                    const struct tgsi_full_instruction *inst,
                                    LLVMTypeRef type, int arg)
 {
        struct gallivm_state *gallivm = &ctx->gallivm;
        LLVMBuilderRef builder = gallivm->builder;
        LLVMValueRef offset, ptr;
        int addr_space;
@@ -554,60 +554,60 @@ static void load_emit(
                const struct lp_build_tgsi_action *action,
                struct lp_build_tgsi_context *bld_base,
                struct lp_build_emit_data *emit_data)
 {
        struct si_shader_context *ctx = si_shader_context(bld_base);
        struct gallivm_state *gallivm = &ctx->gallivm;
        LLVMBuilderRef builder = gallivm->builder;
        const struct tgsi_full_instruction * inst = emit_data->inst;
        const struct tgsi_shader_info *info = &ctx->shader->selector->info;
        char intrinsic_name[64];
-       bool readonly_memory = false;
+       bool can_speculate = false;
 
        if (inst->Src[0].Register.File == TGSI_FILE_MEMORY) {
                load_emit_memory(ctx, emit_data);
                return;
        }
 
        if (inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE)
                si_emit_waitcnt(ctx, VM_CNT);
 
-       readonly_memory = !(inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE) &&
+       can_speculate = !(inst->Memory.Qualifier & TGSI_MEMORY_VOLATILE) &&
                          is_oneway_access_only(inst, info,
                                                info->shader_buffers_store |
                                                info->shader_buffers_atomic,
                                                info->images_store |
                                                info->images_atomic);
 
        if (inst->Src[0].Register.File == TGSI_FILE_BUFFER) {
-               load_emit_buffer(ctx, emit_data, readonly_memory);
+               load_emit_buffer(ctx, emit_data, can_speculate);
                return;
        }
 
        if (inst->Memory.Texture == TGSI_TEXTURE_BUFFER) {
                emit_data->output[emit_data->chan] =
                        lp_build_intrinsic(
                                builder, 
"llvm.amdgcn.buffer.load.format.v4f32", emit_data->dst_type,
                                emit_data->args, emit_data->arg_count,
-                               get_load_intr_attribs(readonly_memory));
+                               get_load_intr_attribs(can_speculate));
        } else {
                ac_get_image_intr_name("llvm.amdgcn.image.load",
                                       emit_data->dst_type,             /* 
vdata */
                                       LLVMTypeOf(emit_data->args[0]), /* 
coords */
                                       LLVMTypeOf(emit_data->args[1]), /* rsrc 
*/
                                       intrinsic_name, sizeof(intrinsic_name));
 
                emit_data->output[emit_data->chan] =
                        lp_build_intrinsic(
                                builder, intrinsic_name, emit_data->dst_type,
                                emit_data->args, emit_data->arg_count,
-                               get_load_intr_attribs(readonly_memory));
+                               get_load_intr_attribs(can_speculate));
        }
 }
 
 static void store_fetch_args(
                struct lp_build_tgsi_context * bld_base,
                struct lp_build_emit_data * emit_data)
 {
        struct si_shader_context *ctx = si_shader_context(bld_base);
        struct gallivm_state *gallivm = &ctx->gallivm;
        LLVMBuilderRef builder = gallivm->builder;
-- 
2.7.4

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