On Tue, May 23, 2017 at 2:37 PM, Anuj Phogat <anuj.pho...@gmail.com> wrote:
> This limit was first introduced in Skylake PRM. But looking at
> the huge limit of 2^38 bytes (~275 GB), I think it is safe to
> apply it to all the previous generations as well.
My assumption is wrong. Pre-gen9 has a limit of 2 GB for surface
size. I'll send out a V2.
>
> Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com>
> ---
> src/intel/isl/isl.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index 32aa698..b81e031 100644
> --- a/src/intel/isl/isl.c
> +++ b/src/intel/isl/isl.c
> @@ -1398,6 +1398,9 @@ isl_surf_init_s(const struct isl_device *dev,
> base_alignment = MAX(info->min_alignment, tile_size);
> }
>
> + if (size > (uint64_t) 2 << 38)
> + return false;
> +
> *surf = (struct isl_surf) {
> .dim = info->dim,
> .dim_layout = dim_layout,
> --
> 2.9.3
>
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