Name the options to "Pixel Location":
- PIXLOC_CENTER -> CENTER
- PIXLOC_UL_CORNER -> UL_CORNER
Signed-off-by: Rafael Antognolli <rafael.antogno...@intel.com>
Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
---
src/intel/blorp/blorp_genX_exec.h | 4 +---
src/intel/genxml/gen6.xml | 4 ++--
src/intel/genxml/gen7.xml | 4 ++--
src/intel/genxml/gen75.xml | 4 ++--
src/intel/vulkan/genX_pipeline.c | 3 +--
5 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/src/intel/blorp/blorp_genX_exec.h
b/src/intel/blorp/blorp_genX_exec.h
index bc829d0..be22be0 100644
--- a/src/intel/blorp/blorp_genX_exec.h
+++ b/src/intel/blorp/blorp_genX_exec.h
@@ -1188,9 +1188,7 @@ blorp_emit_3dstate_multisample(struct blorp_batch *batch,
* should not have any effect by setting or not setting this bit.
*/
ms.PixelPositionOffsetEnable = false;
- ms.PixelLocation = CENTER;
#elif GEN_GEN >= 7
- ms.PixelLocation = PIXLOC_CENTER;
switch (params->num_samples) {
case 1:
@@ -1209,9 +1207,9 @@ blorp_emit_3dstate_multisample(struct blorp_batch *batch,
break;
}
#else
- ms.PixelLocation = PIXLOC_CENTER;
GEN_SAMPLE_POS_4X(ms.Sample);
#endif
+ ms.PixelLocation = CENTER;
}
}
diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index 2cb9419..a8ce7e0 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -1089,8 +1089,8 @@
<field name="3D Command Sub Opcode" start="16" end="23" type="uint"
default="13"/>
<field name="DWord Length" start="0" end="7" type="uint" default="1"/>
<field name="Pixel Location" start="36" end="36" type="uint">
- <value name="PIXLOC_CENTER" value="0"/>
- <value name="PIXLOC_UL_CORNER" value="1"/>
+ <value name="CENTER" value="0"/>
+ <value name="UL_CORNER" value="1"/>
</field>
<field name="Number of Multisamples" start="33" end="35" type="uint">
<value name="NUMSAMPLES_1" value="0"/>
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 75954fe..fd70414 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -1262,8 +1262,8 @@
<field name="3D Command Sub Opcode" start="16" end="23" type="uint"
default="13"/>
<field name="DWord Length" start="0" end="7" type="uint" default="2"/>
<field name="Pixel Location" start="36" end="36" type="uint">
- <value name="PIXLOC_CENTER" value="0"/>
- <value name="PIXLOC_UL_CORNER" value="1"/>
+ <value name="CENTER" value="0"/>
+ <value name="UL_CORNER" value="1"/>
</field>
<field name="Number of Multisamples" start="33" end="35" type="uint">
<value name="NUMSAMPLES_1" value="0"/>
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 1e64fef..ac2dbc3 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -1548,8 +1548,8 @@
<field name="DWord Length" start="0" end="7" type="uint" default="2"/>
<field name="Multi Sample Enable" start="37" end="37" type="bool"/>
<field name="Pixel Location" start="36" end="36" type="uint">
- <value name="PIXLOC_CENTER" value="0"/>
- <value name="PIXLOC_UL_CORNER" value="1"/>
+ <value name="CENTER" value="0"/>
+ <value name="UL_CORNER" value="1"/>
</field>
<field name="Number of Multisamples" start="33" end="35" type="uint">
<value name="NUMSAMPLES_1" value="0"/>
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 954273b..43e6ab5 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -549,6 +549,7 @@ emit_ms_state(struct anv_pipeline *pipeline,
anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) {
ms.NumberofMultisamples = log2_samples;
+ ms.PixelLocation = CENTER;
#if GEN_GEN >= 8
/* The PRM says that this bit is valid only for DX9:
*
@@ -556,9 +557,7 @@ emit_ms_state(struct anv_pipeline *pipeline,
* should not have any effect by setting or not setting this bit.
*/
ms.PixelPositionOffsetEnable = false;
- ms.PixelLocation = CENTER;
#else
- ms.PixelLocation = PIXLOC_CENTER;
switch (samples) {
case 1:
--
git-series 0.9.1
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