I've hated this pass for quite a while. It is necessary for nv30 but is actively harmful for nv50+ due to the undef issue nha points out. I haven't looked closely at the impl details, but the idea is acked-by me.
On Apr 25, 2017 5:44 AM, "Samuel Pitoiset" <samuel.pitoi...@gmail.com> wrote: > > > On 04/25/2017 08:47 AM, Nicolai Hähnle wrote: > >> Interesting find. Is this in shaders with control flow? Perhaps with this >> change, there are now more undefs in places that previously had a phi with >> an unrelated use of the same TGSI temporary. Anyway, patches 1-3: >> > > Yes. Looks like some shaders have a complex control flow. > > >> Reviewed-by: Nicolai Hähnle <nicolai.haeh...@amd.com> >> >> >> On 25.04.2017 00:31, Samuel Pitoiset wrote: >> >>> 47109 shaders in 29632 tests >>> Totals: >>> SGPRS: 1917364 -> 1916620 (-0.04 %) >>> VGPRS: 1165802 -> 1165202 (-0.05 %) >>> Spilled SGPRs: 1880 -> 1843 (-1.97 %) >>> Spilled VGPRs: 70 -> 65 (-7.14 %) >>> Private memory VGPRs: 1184 -> 1184 (0.00 %) >>> Scratch size: 1312 -> 1308 (-0.30 %) dwords per thread >>> Code Size: 60211356 -> 60192268 (-0.03 %) bytes >>> LDS: 1077 -> 1077 (0.00 %) blocks >>> Max Waves: 428597 -> 428674 (0.02 %) >>> Wait states: 0 -> 0 (0.00 %) >>> >>> Totals from affected shaders: >>> SGPRS: 238173 -> 237429 (-0.31 %) >>> VGPRS: 149556 -> 148956 (-0.40 %) >>> Spilled SGPRs: 1263 -> 1226 (-2.93 %) >>> Spilled VGPRs: 25 -> 20 (-20.00 %) >>> Private memory VGPRs: 0 -> 0 (0.00 %) >>> Scratch size: 20 -> 16 (-20.00 %) dwords per thread >>> Code Size: 10457904 -> 10438816 (-0.18 %) bytes >>> LDS: 50 -> 50 (0.00 %) blocks >>> Max Waves: 41283 -> 41360 (0.19 %) >>> Wait states: 0 -> 0 (0.00 %) >>> >>> Signed-off-by: Samuel Pitoiset <samuel.pitoi...@gmail.com> >>> --- >>> src/gallium/drivers/radeonsi/si_pipe.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c >>> b/src/gallium/drivers/radeonsi/si_pipe.c >>> index 2a11607c90..cfbcbe2b74 100644 >>> --- a/src/gallium/drivers/radeonsi/si_pipe.c >>> +++ b/src/gallium/drivers/radeonsi/si_pipe.c >>> @@ -680,6 +680,7 @@ static int si_get_shader_param(struct pipe_screen* >>> pscreen, >>> case PIPE_SHADER_CAP_INTEGERS: >>> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED: >>> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE: >>> + case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS: >>> return 1; >>> >>> case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR: >>> @@ -693,7 +694,6 @@ static int si_get_shader_param(struct pipe_screen* >>> pscreen, >>> case PIPE_SHADER_CAP_SUPPORTED_IRS: >>> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED: >>> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED: >>> - case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS: >>> return 0; >>> } >>> return 0; >>> >>> >> >> _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/mesa-dev >
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