From: Kenneth Graunke <kenn...@whitecape.org>
Build libi965_gen[4,5].la too, since they contain the declaration for
gen[4,5]_init_atoms.
Remove gen4 and 5 init_atoms from genX_state_upload.
Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
Signed-off-by: Rafael Antognolli <rafael.antogno...@intel.com>
---
src/mesa/drivers/dri/i965/Makefile.am | 8 +-
src/mesa/drivers/dri/i965/Makefile.sources | 6 +-
src/mesa/drivers/dri/i965/brw_state.h | 12 +-
src/mesa/drivers/dri/i965/brw_state_upload.c | 383 +------------------
src/mesa/drivers/dri/i965/gen45_state_upload.c | 96 +++++-
src/mesa/drivers/dri/i965/genX_state_upload.c | 282 +++++++++++++-
6 files changed, 419 insertions(+), 368 deletions(-)
create mode 100644 src/mesa/drivers/dri/i965/gen45_state_upload.c
diff --git a/src/mesa/drivers/dri/i965/Makefile.am
b/src/mesa/drivers/dri/i965/Makefile.am
index 4e9b062..eab9c53 100644
--- a/src/mesa/drivers/dri/i965/Makefile.am
+++ b/src/mesa/drivers/dri/i965/Makefile.am
@@ -46,12 +46,20 @@ AM_CFLAGS = \
AM_CXXFLAGS = $(AM_CFLAGS)
I965_PERGEN_LIBS = \
+ libi965_gen4.la \
+ libi965_gen5.la \
libi965_gen6.la \
libi965_gen7.la \
libi965_gen75.la \
libi965_gen8.la \
libi965_gen9.la
+libi965_gen4_la_SOURCES = $(i965_gen4_FILES)
+libi965_gen4_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=40
+
+libi965_gen5_la_SOURCES = $(i965_gen5_FILES)
+libi965_gen5_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=50
+
libi965_gen6_la_SOURCES = $(i965_gen6_FILES)
libi965_gen6_la_CFLAGS = $(AM_CFLAGS) -DGEN_VERSIONx10=60
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources
b/src/mesa/drivers/dri/i965/Makefile.sources
index 71a0f4f..bbb8d6d 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -162,6 +162,12 @@ i965_FILES = \
intel_upload.c \
libdrm_macros.h
+i965_gen4_FILES = \
+ gen45_state_upload.c
+
+i965_gen5_FILES = \
+ gen45_state_upload.c
+
i965_gen6_FILES = \
genX_blorp_exec.c \
genX_state_upload.c
diff --git a/src/mesa/drivers/dri/i965/brw_state.h
b/src/mesa/drivers/dri/i965/brw_state.h
index ec79a4e..008326a 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -441,6 +441,18 @@ void brw_calculate_guardband_size(const struct
gen_device_info *devinfo,
float *xmin, float *xmax,
float *ymin, float *ymax);
+void brw_copy_pipeline_atoms(struct brw_context *brw,
+ enum brw_pipeline pipeline,
+ const struct brw_tracked_state **atoms,
+ int num_atoms);
+void gen4_init_atoms(struct brw_context *brw);
+void gen5_init_atoms(struct brw_context *brw);
+void gen6_init_atoms(struct brw_context *brw);
+void gen7_init_atoms(struct brw_context *brw);
+void gen75_init_atoms(struct brw_context *brw);
+void gen8_init_atoms(struct brw_context *brw);
+void gen9_init_atoms(struct brw_context *brw);
+
#ifdef __cplusplus
}
#endif
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 9c0b82c..e434624 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -45,341 +45,6 @@
#include "brw_cs.h"
#include "main/framebuffer.h"
-static const struct brw_tracked_state *gen4_atoms[] =
-{
- /* Once all the programs are done, we know how large urb entry
- * sizes need to be and can decide if we need to change the urb
- * layout.
- */
- &brw_curbe_offsets,
- &brw_recalculate_urb_fence,
-
- &brw_cc_vp,
- &brw_cc_unit,
-
- /* Surface state setup. Must come before the VS/WM unit. The binding
- * table upload must be last.
- */
- &brw_vs_pull_constants,
- &brw_wm_pull_constants,
- &brw_renderbuffer_surfaces,
- &brw_renderbuffer_read_surfaces,
- &brw_texture_surfaces,
- &brw_vs_binding_table,
- &brw_wm_binding_table,
-
- &brw_fs_samplers,
- &brw_vs_samplers,
-
- /* These set up state for brw_psp_urb_cbs */
- &brw_wm_unit,
- &brw_sf_vp,
- &brw_sf_unit,
- &brw_vs_unit, /* always required, enabled or not */
- &brw_clip_unit,
- &brw_gs_unit,
-
- /* Command packets:
- */
- &brw_invariant_state,
-
- &brw_binding_table_pointers,
- &brw_blend_constant_color,
-
- &brw_depthbuffer,
-
- &brw_polygon_stipple,
- &brw_polygon_stipple_offset,
-
- &brw_line_stipple,
-
- &brw_psp_urb_cbs,
-
- &brw_drawing_rect,
- &brw_indices, /* must come before brw_vertices */
- &brw_index_buffer,
- &brw_vertices,
-
- &brw_constant_buffer
-};
-
-static const struct brw_tracked_state *gen6_atoms[] =
-{
- &gen6_sf_and_clip_viewports,
-
- /* Command packets: */
-
- &brw_cc_vp,
- &gen6_viewport_state, /* must do after *_vp stages */
-
- &gen6_urb,
- &gen6_blend_state, /* must do before cc unit */
- &gen6_color_calc_state, /* must do before cc unit */
- &gen6_depth_stencil_state, /* must do before cc unit */
-
- &gen6_vs_push_constants, /* Before vs_state */
- &gen6_gs_push_constants, /* Before gs_state */
- &gen6_wm_push_constants, /* Before wm_state */
-
- /* Surface state setup. Must come before the VS/WM unit. The binding
- * table upload must be last.
- */
- &brw_vs_pull_constants,
- &brw_vs_ubo_surfaces,
- &brw_gs_pull_constants,
- &brw_gs_ubo_surfaces,
- &brw_wm_pull_constants,
- &brw_wm_ubo_surfaces,
- &gen6_renderbuffer_surfaces,
- &brw_renderbuffer_read_surfaces,
- &brw_texture_surfaces,
- &gen6_sol_surface,
- &brw_vs_binding_table,
- &gen6_gs_binding_table,
- &brw_wm_binding_table,
-
- &brw_fs_samplers,
- &brw_vs_samplers,
- &brw_gs_samplers,
- &gen6_sampler_state,
- &gen6_multisample_state,
-
- &gen6_vs_state,
- &gen6_gs_state,
- &gen6_clip_state,
- &gen6_sf_state,
- &gen6_wm_state,
-
- &gen6_scissor_state,
-
- &gen6_binding_table_pointers,
-
- &brw_depthbuffer,
-
- &brw_polygon_stipple,
- &brw_polygon_stipple_offset,
-
- &brw_line_stipple,
-
- &brw_drawing_rect,
-
- &brw_indices, /* must come before brw_vertices */
- &brw_index_buffer,
- &brw_vertices,
-};
-
-static const struct brw_tracked_state *gen7_render_atoms[] =
-{
- /* Command packets: */
-
- &brw_cc_vp,
- &gen7_sf_clip_viewport,
-
- &gen7_l3_state,
- &gen7_push_constant_space,
- &gen7_urb,
- &gen6_blend_state, /* must do before cc unit */
- &gen6_color_calc_state, /* must do before cc unit */
- &gen6_depth_stencil_state, /* must do before cc unit */
-
- &brw_vs_image_surfaces, /* Before vs push/pull constants and binding table
*/
- &brw_tcs_image_surfaces, /* Before tcs push/pull constants and binding
table */
- &brw_tes_image_surfaces, /* Before tes push/pull constants and binding
table */
- &brw_gs_image_surfaces, /* Before gs push/pull constants and binding table
*/
- &brw_wm_image_surfaces, /* Before wm push/pull constants and binding table
*/
-
- &gen6_vs_push_constants, /* Before vs_state */
- &gen7_tcs_push_constants,
- &gen7_tes_push_constants,
- &gen6_gs_push_constants, /* Before gs_state */
- &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
-
- /* Surface state setup. Must come before the VS/WM unit. The binding
- * table upload must be last.
- */
- &brw_vs_pull_constants,
- &brw_vs_ubo_surfaces,
- &brw_vs_abo_surfaces,
- &brw_tcs_pull_constants,
- &brw_tcs_ubo_surfaces,
- &brw_tcs_abo_surfaces,
- &brw_tes_pull_constants,
- &brw_tes_ubo_surfaces,
- &brw_tes_abo_surfaces,
- &brw_gs_pull_constants,
- &brw_gs_ubo_surfaces,
- &brw_gs_abo_surfaces,
- &brw_wm_pull_constants,
- &brw_wm_ubo_surfaces,
- &brw_wm_abo_surfaces,
- &gen6_renderbuffer_surfaces,
- &brw_renderbuffer_read_surfaces,
- &brw_texture_surfaces,
- &brw_vs_binding_table,
- &brw_tcs_binding_table,
- &brw_tes_binding_table,
- &brw_gs_binding_table,
- &brw_wm_binding_table,
-
- &brw_fs_samplers,
- &brw_vs_samplers,
- &brw_tcs_samplers,
- &brw_tes_samplers,
- &brw_gs_samplers,
- &gen6_multisample_state,
-
- &gen7_vs_state,
- &gen7_hs_state,
- &gen7_te_state,
- &gen7_ds_state,
- &gen7_gs_state,
- &gen7_sol_state,
- &gen6_clip_state,
- &gen7_sbe_state,
- &gen7_sf_state,
- &gen7_wm_state,
- &gen7_ps_state,
-
- &gen6_scissor_state,
-
- &gen7_depthbuffer,
-
- &brw_polygon_stipple,
- &brw_polygon_stipple_offset,
-
- &brw_line_stipple,
-
- &brw_drawing_rect,
-
- &brw_indices, /* must come before brw_vertices */
- &brw_index_buffer,
- &brw_vertices,
-
- &haswell_cut_index,
-};
-
-static const struct brw_tracked_state *gen7_compute_atoms[] =
-{
- &gen7_l3_state,
- &brw_cs_image_surfaces,
- &gen7_cs_push_constants,
- &brw_cs_pull_constants,
- &brw_cs_ubo_surfaces,
- &brw_cs_abo_surfaces,
- &brw_cs_texture_surfaces,
- &brw_cs_work_groups_surface,
- &brw_cs_samplers,
- &brw_cs_state,
-};
-
-static const struct brw_tracked_state *gen8_render_atoms[] =
-{
- &brw_cc_vp,
- &gen8_sf_clip_viewport,
-
- &gen7_l3_state,
- &gen7_push_constant_space,
- &gen7_urb,
- &gen8_blend_state,
- &gen6_color_calc_state,
-
- &brw_vs_image_surfaces, /* Before vs push/pull constants and binding table
*/
- &brw_tcs_image_surfaces, /* Before tcs push/pull constants and binding
table */
- &brw_tes_image_surfaces, /* Before tes push/pull constants and binding
table */
- &brw_gs_image_surfaces, /* Before gs push/pull constants and binding table
*/
- &brw_wm_image_surfaces, /* Before wm push/pull constants and binding table
*/
-
- &gen6_vs_push_constants, /* Before vs_state */
- &gen7_tcs_push_constants,
- &gen7_tes_push_constants,
- &gen6_gs_push_constants, /* Before gs_state */
- &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
-
- /* Surface state setup. Must come before the VS/WM unit. The binding
- * table upload must be last.
- */
- &brw_vs_pull_constants,
- &brw_vs_ubo_surfaces,
- &brw_vs_abo_surfaces,
- &brw_tcs_pull_constants,
- &brw_tcs_ubo_surfaces,
- &brw_tcs_abo_surfaces,
- &brw_tes_pull_constants,
- &brw_tes_ubo_surfaces,
- &brw_tes_abo_surfaces,
- &brw_gs_pull_constants,
- &brw_gs_ubo_surfaces,
- &brw_gs_abo_surfaces,
- &brw_wm_pull_constants,
- &brw_wm_ubo_surfaces,
- &brw_wm_abo_surfaces,
- &gen6_renderbuffer_surfaces,
- &brw_renderbuffer_read_surfaces,
- &brw_texture_surfaces,
- &brw_vs_binding_table,
- &brw_tcs_binding_table,
- &brw_tes_binding_table,
- &brw_gs_binding_table,
- &brw_wm_binding_table,
-
- &brw_fs_samplers,
- &brw_vs_samplers,
- &brw_tcs_samplers,
- &brw_tes_samplers,
- &brw_gs_samplers,
- &gen8_multisample_state,
-
- &gen8_vs_state,
- &gen8_hs_state,
- &gen7_te_state,
- &gen8_ds_state,
- &gen8_gs_state,
- &gen7_sol_state,
- &gen6_clip_state,
- &gen8_raster_state,
- &gen8_sbe_state,
- &gen8_sf_state,
- &gen8_ps_blend,
- &gen8_ps_extra,
- &gen8_ps_state,
- &gen8_wm_depth_stencil,
- &gen8_wm_state,
-
- &gen6_scissor_state,
-
- &gen7_depthbuffer,
-
- &brw_polygon_stipple,
- &brw_polygon_stipple_offset,
-
- &brw_line_stipple,
-
- &brw_drawing_rect,
-
- &gen8_vf_topology,
-
- &brw_indices,
- &gen8_index_buffer,
- &gen8_vertices,
-
- &haswell_cut_index,
- &gen8_pma_fix,
-};
-
-static const struct brw_tracked_state *gen8_compute_atoms[] =
-{
- &gen7_l3_state,
- &brw_cs_image_surfaces,
- &gen7_cs_push_constants,
- &brw_cs_pull_constants,
- &brw_cs_ubo_surfaces,
- &brw_cs_abo_surfaces,
- &brw_cs_texture_surfaces,
- &brw_cs_work_groups_surface,
- &brw_cs_samplers,
- &brw_cs_state,
-};
-
static void
brw_upload_initial_gpu_state(struct brw_context *brw)
{
@@ -439,7 +104,7 @@ brw_get_pipeline_atoms(struct brw_context *brw,
}
}
-static void
+void
brw_copy_pipeline_atoms(struct brw_context *brw,
enum brw_pipeline pipeline,
const struct brw_tracked_state **atoms,
@@ -467,40 +132,22 @@ void brw_init_state( struct brw_context *brw )
/* Force the first brw_select_pipeline to emit pipeline select */
brw->last_pipeline = BRW_NUM_PIPELINES;
- STATIC_ASSERT(ARRAY_SIZE(gen4_atoms) <= ARRAY_SIZE(brw->render_atoms));
- STATIC_ASSERT(ARRAY_SIZE(gen6_atoms) <= ARRAY_SIZE(brw->render_atoms));
- STATIC_ASSERT(ARRAY_SIZE(gen7_render_atoms) <=
- ARRAY_SIZE(brw->render_atoms));
- STATIC_ASSERT(ARRAY_SIZE(gen8_render_atoms) <=
- ARRAY_SIZE(brw->render_atoms));
- STATIC_ASSERT(ARRAY_SIZE(gen7_compute_atoms) <=
- ARRAY_SIZE(brw->compute_atoms));
- STATIC_ASSERT(ARRAY_SIZE(gen8_compute_atoms) <=
- ARRAY_SIZE(brw->compute_atoms));
-
brw_init_caches(brw);
- if (brw->gen >= 8) {
- brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
- gen8_render_atoms,
- ARRAY_SIZE(gen8_render_atoms));
- brw_copy_pipeline_atoms(brw, BRW_COMPUTE_PIPELINE,
- gen8_compute_atoms,
- ARRAY_SIZE(gen8_compute_atoms));
- } else if (brw->gen == 7) {
- brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
- gen7_render_atoms,
- ARRAY_SIZE(gen7_render_atoms));
- brw_copy_pipeline_atoms(brw, BRW_COMPUTE_PIPELINE,
- gen7_compute_atoms,
- ARRAY_SIZE(gen7_compute_atoms));
- } else if (brw->gen == 6) {
- brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
- gen6_atoms, ARRAY_SIZE(gen6_atoms));
- } else {
- brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
- gen4_atoms, ARRAY_SIZE(gen4_atoms));
- }
+ if (brw->gen >= 9)
+ gen9_init_atoms(brw);
+ else if (brw->gen >= 8)
+ gen8_init_atoms(brw);
+ else if (brw->is_haswell)
+ gen75_init_atoms(brw);
+ else if (brw->gen >= 7)
+ gen7_init_atoms(brw);
+ else if (brw->gen >= 6)
+ gen6_init_atoms(brw);
+ else if (brw->gen >= 5)
+ gen5_init_atoms(brw);
+ else
+ gen4_init_atoms(brw);
brw_upload_initial_gpu_state(brw);
diff --git a/src/mesa/drivers/dri/i965/gen45_state_upload.c
b/src/mesa/drivers/dri/i965/gen45_state_upload.c
new file mode 100644
index 0000000..d59c11d
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen45_state_upload.c
@@ -0,0 +1,96 @@
+/*
+ * Copyright © 2017 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include <assert.h>
+
+#include "common/gen_device_info.h"
+#include "genxml/gen_macros.h"
+
+#include "brw_context.h"
+#include "brw_state.h"
+
+void
+genX(init_atoms)(struct brw_context *brw)
+{
+ static const struct brw_tracked_state *render_atoms[] =
+ {
+ /* Once all the programs are done, we know how large urb entry
+ * sizes need to be and can decide if we need to change the urb
+ * layout.
+ */
+ &brw_curbe_offsets,
+ &brw_recalculate_urb_fence,
+
+ &brw_cc_vp,
+ &brw_cc_unit,
+
+ /* Surface state setup. Must come before the VS/WM unit. The binding
+ * table upload must be last.
+ */
+ &brw_vs_pull_constants,
+ &brw_wm_pull_constants,
+ &brw_renderbuffer_surfaces,
+ &brw_renderbuffer_read_surfaces,
+ &brw_texture_surfaces,
+ &brw_vs_binding_table,
+ &brw_wm_binding_table,
+
+ &brw_fs_samplers,
+ &brw_vs_samplers,
+
+ /* These set up state for brw_psp_urb_cbs */
+ &brw_wm_unit,
+ &brw_sf_vp,
+ &brw_sf_unit,
+ &brw_vs_unit, /* always required, enabled or not */
+ &brw_clip_unit,
+ &brw_gs_unit,
+
+ /* Command packets:
+ */
+ &brw_invariant_state,
+
+ &brw_binding_table_pointers,
+ &brw_blend_constant_color,
+
+ &brw_depthbuffer,
+
+ &brw_polygon_stipple,
+ &brw_polygon_stipple_offset,
+
+ &brw_line_stipple,
+
+ &brw_psp_urb_cbs,
+
+ &brw_drawing_rect,
+ &brw_indices, /* must come before brw_vertices */
+ &brw_index_buffer,
+ &brw_vertices,
+
+ &brw_constant_buffer
+ };
+
+ STATIC_ASSERT(ARRAY_SIZE(render_atoms) <= ARRAY_SIZE(brw->render_atoms));
+ brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
+ render_atoms, ARRAY_SIZE(render_atoms));
+}
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c
b/src/mesa/drivers/dri/i965/genX_state_upload.c
index 25bf4b6..24f32ca 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -107,3 +107,285 @@ __gen_combine_address(struct brw_context *brw, void
*location,
_dst = NULL)
/* ---------------------------------------------------------------------- */
+
+
+/* ---------------------------------------------------------------------- */
+
+void
+genX(init_atoms)(struct brw_context *brw)
+{
+#if GEN_GEN == 6
+ static const struct brw_tracked_state *render_atoms[] =
+ {
+ &gen6_sf_and_clip_viewports,
+
+ /* Command packets: */
+
+ &brw_cc_vp,
+ &gen6_viewport_state, /* must do after *_vp stages */
+
+ &gen6_urb,
+ &gen6_blend_state, /* must do before cc unit */
+ &gen6_color_calc_state, /* must do before cc unit */
+ &gen6_depth_stencil_state, /* must do before cc unit */
+
+ &gen6_vs_push_constants, /* Before vs_state */
+ &gen6_gs_push_constants, /* Before gs_state */
+ &gen6_wm_push_constants, /* Before wm_state */
+
+ /* Surface state setup. Must come before the VS/WM unit. The binding
+ * table upload must be last.
+ */
+ &brw_vs_pull_constants,
+ &brw_vs_ubo_surfaces,
+ &brw_gs_pull_constants,
+ &brw_gs_ubo_surfaces,
+ &brw_wm_pull_constants,
+ &brw_wm_ubo_surfaces,
+ &gen6_renderbuffer_surfaces,
+ &brw_renderbuffer_read_surfaces,
+ &brw_texture_surfaces,
+ &gen6_sol_surface,
+ &brw_vs_binding_table,
+ &gen6_gs_binding_table,
+ &brw_wm_binding_table,
+
+ &brw_fs_samplers,
+ &brw_vs_samplers,
+ &brw_gs_samplers,
+ &gen6_sampler_state,
+ &gen6_multisample_state,
+
+ &gen6_vs_state,
+ &gen6_gs_state,
+ &gen6_clip_state,
+ &gen6_sf_state,
+ &gen6_wm_state,
+
+ &gen6_scissor_state,
+
+ &gen6_binding_table_pointers,
+
+ &brw_depthbuffer,
+
+ &brw_polygon_stipple,
+ &brw_polygon_stipple_offset,
+
+ &brw_line_stipple,
+
+ &brw_drawing_rect,
+
+ &brw_indices, /* must come before brw_vertices */
+ &brw_index_buffer,
+ &brw_vertices,
+ };
+#elif GEN_GEN == 7
+ static const struct brw_tracked_state *render_atoms[] =
+ {
+ /* Command packets: */
+
+ &brw_cc_vp,
+ &gen7_sf_clip_viewport,
+
+ &gen7_l3_state,
+ &gen7_push_constant_space,
+ &gen7_urb,
+ &gen6_blend_state, /* must do before cc unit */
+ &gen6_color_calc_state, /* must do before cc unit */
+ &gen6_depth_stencil_state, /* must do before cc unit */
+
+ &brw_vs_image_surfaces, /* Before vs push/pull constants and binding
table */
+ &brw_tcs_image_surfaces, /* Before tcs push/pull constants and binding
table */
+ &brw_tes_image_surfaces, /* Before tes push/pull constants and binding
table */
+ &brw_gs_image_surfaces, /* Before gs push/pull constants and binding
table */
+ &brw_wm_image_surfaces, /* Before wm push/pull constants and binding
table */
+
+ &gen6_vs_push_constants, /* Before vs_state */
+ &gen7_tcs_push_constants,
+ &gen7_tes_push_constants,
+ &gen6_gs_push_constants, /* Before gs_state */
+ &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
+
+ /* Surface state setup. Must come before the VS/WM unit. The binding
+ * table upload must be last.
+ */
+ &brw_vs_pull_constants,
+ &brw_vs_ubo_surfaces,
+ &brw_vs_abo_surfaces,
+ &brw_tcs_pull_constants,
+ &brw_tcs_ubo_surfaces,
+ &brw_tcs_abo_surfaces,
+ &brw_tes_pull_constants,
+ &brw_tes_ubo_surfaces,
+ &brw_tes_abo_surfaces,
+ &brw_gs_pull_constants,
+ &brw_gs_ubo_surfaces,
+ &brw_gs_abo_surfaces,
+ &brw_wm_pull_constants,
+ &brw_wm_ubo_surfaces,
+ &brw_wm_abo_surfaces,
+ &gen6_renderbuffer_surfaces,
+ &brw_renderbuffer_read_surfaces,
+ &brw_texture_surfaces,
+ &brw_vs_binding_table,
+ &brw_tcs_binding_table,
+ &brw_tes_binding_table,
+ &brw_gs_binding_table,
+ &brw_wm_binding_table,
+
+ &brw_fs_samplers,
+ &brw_vs_samplers,
+ &brw_tcs_samplers,
+ &brw_tes_samplers,
+ &brw_gs_samplers,
+ &gen6_multisample_state,
+
+ &gen7_vs_state,
+ &gen7_hs_state,
+ &gen7_te_state,
+ &gen7_ds_state,
+ &gen7_gs_state,
+ &gen7_sol_state,
+ &gen6_clip_state,
+ &gen7_sbe_state,
+ &gen7_sf_state,
+ &gen7_wm_state,
+ &gen7_ps_state,
+
+ &gen6_scissor_state,
+
+ &gen7_depthbuffer,
+
+ &brw_polygon_stipple,
+ &brw_polygon_stipple_offset,
+
+ &brw_line_stipple,
+
+ &brw_drawing_rect,
+
+ &brw_indices, /* must come before brw_vertices */
+ &brw_index_buffer,
+ &brw_vertices,
+
+ &haswell_cut_index,
+ };
+#elif GEN_GEN >= 8
+ static const struct brw_tracked_state *render_atoms[] =
+ {
+ &brw_cc_vp,
+ &gen8_sf_clip_viewport,
+
+ &gen7_l3_state,
+ &gen7_push_constant_space,
+ &gen7_urb,
+ &gen8_blend_state,
+ &gen6_color_calc_state,
+
+ &brw_vs_image_surfaces, /* Before vs push/pull constants and binding
table */
+ &brw_tcs_image_surfaces, /* Before tcs push/pull constants and binding
table */
+ &brw_tes_image_surfaces, /* Before tes push/pull constants and binding
table */
+ &brw_gs_image_surfaces, /* Before gs push/pull constants and binding
table */
+ &brw_wm_image_surfaces, /* Before wm push/pull constants and binding
table */
+
+ &gen6_vs_push_constants, /* Before vs_state */
+ &gen7_tcs_push_constants,
+ &gen7_tes_push_constants,
+ &gen6_gs_push_constants, /* Before gs_state */
+ &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
+
+ /* Surface state setup. Must come before the VS/WM unit. The binding
+ * table upload must be last.
+ */
+ &brw_vs_pull_constants,
+ &brw_vs_ubo_surfaces,
+ &brw_vs_abo_surfaces,
+ &brw_tcs_pull_constants,
+ &brw_tcs_ubo_surfaces,
+ &brw_tcs_abo_surfaces,
+ &brw_tes_pull_constants,
+ &brw_tes_ubo_surfaces,
+ &brw_tes_abo_surfaces,
+ &brw_gs_pull_constants,
+ &brw_gs_ubo_surfaces,
+ &brw_gs_abo_surfaces,
+ &brw_wm_pull_constants,
+ &brw_wm_ubo_surfaces,
+ &brw_wm_abo_surfaces,
+ &gen6_renderbuffer_surfaces,
+ &brw_renderbuffer_read_surfaces,
+ &brw_texture_surfaces,
+ &brw_vs_binding_table,
+ &brw_tcs_binding_table,
+ &brw_tes_binding_table,
+ &brw_gs_binding_table,
+ &brw_wm_binding_table,
+
+ &brw_fs_samplers,
+ &brw_vs_samplers,
+ &brw_tcs_samplers,
+ &brw_tes_samplers,
+ &brw_gs_samplers,
+ &gen8_multisample_state,
+
+ &gen8_vs_state,
+ &gen8_hs_state,
+ &gen7_te_state,
+ &gen8_ds_state,
+ &gen8_gs_state,
+ &gen7_sol_state,
+ &gen6_clip_state,
+ &gen8_raster_state,
+ &gen8_sbe_state,
+ &gen8_sf_state,
+ &gen8_ps_blend,
+ &gen8_ps_extra,
+ &gen8_ps_state,
+ &gen8_wm_depth_stencil,
+ &gen8_wm_state,
+
+ &gen6_scissor_state,
+
+ &gen7_depthbuffer,
+
+ &brw_polygon_stipple,
+ &brw_polygon_stipple_offset,
+
+ &brw_line_stipple,
+
+ &brw_drawing_rect,
+
+ &gen8_vf_topology,
+
+ &brw_indices,
+ &gen8_index_buffer,
+ &gen8_vertices,
+
+ &haswell_cut_index,
+ &gen8_pma_fix,
+ };
+#endif
+
+ STATIC_ASSERT(ARRAY_SIZE(render_atoms) <= ARRAY_SIZE(brw->render_atoms));
+ brw_copy_pipeline_atoms(brw, BRW_RENDER_PIPELINE,
+ render_atoms, ARRAY_SIZE(render_atoms));
+
+#if GEN_GEN >= 7
+ static const struct brw_tracked_state *compute_atoms[] =
+ {
+ &gen7_l3_state,
+ &brw_cs_image_surfaces,
+ &gen7_cs_push_constants,
+ &brw_cs_pull_constants,
+ &brw_cs_ubo_surfaces,
+ &brw_cs_abo_surfaces,
+ &brw_cs_texture_surfaces,
+ &brw_cs_work_groups_surface,
+ &brw_cs_samplers,
+ &brw_cs_state,
+ };
+
+ STATIC_ASSERT(ARRAY_SIZE(compute_atoms) <= ARRAY_SIZE(brw->compute_atoms));
+ brw_copy_pipeline_atoms(brw, BRW_COMPUTE_PIPELINE,
+ compute_atoms, ARRAY_SIZE(compute_atoms));
+#endif
+}
--
git-series 0.9.1
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