Previously a zero writemask would result in dst_chan == -1, meaning an
unnecessary MOV with the destination register dictated by undefined memory
contents would be emitted before returning. This caused intermittent GPU
hangs, e.g. with glean/texCombine.
---
src/mesa/drivers/dri/i965/brw_wm_emit.c | 10 +++++-----
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c
b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index b5a4a4f..5905ba9 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -888,6 +888,11 @@ void emit_math1(struct brw_wm_compile *c,
BRW_MATH_SATURATE_NONE);
struct brw_reg src;
+ if (!(mask & WRITEMASK_XYZW))
+ return; /* Do not emit dead code */
+
+ assert(is_power_of_two(mask & WRITEMASK_XYZW));
+
if (intel->gen >= 6 && ((arg0[0].hstride == BRW_HORIZONTAL_STRIDE_0 ||
arg0[0].file != BRW_GENERAL_REGISTER_FILE) ||
arg0[0].negate || arg0[0].abs)) {
@@ -903,11 +908,6 @@ void emit_math1(struct brw_wm_compile *c,
src = arg0[0];
}
- if (!(mask & WRITEMASK_XYZW))
- return; /* Do not emit dead code */
-
- assert(is_power_of_two(mask & WRITEMASK_XYZW));
-
/* Send two messages to perform all 16 operations:
*/
brw_push_insn_state(p);
--
1.7.3.1
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