It's unclear exactly what the alignment requirements are for Radeon tiled
surfaces, but they differ between the DDX and Mesa. Make Mesa match the DDX.

Signed-off-by: Simon Farnsworth <simon.farnswo...@onelan.co.uk>
---
This basically copies across the DDX versions of the restrictions. They
differ, and I'm not sure which one's right.

Someone from AMD should review this before it's applied.

 src/gallium/drivers/r600/r600_texture.c |   22 ++++++++++------------
 1 files changed, 10 insertions(+), 12 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_texture.c 
b/src/gallium/drivers/r600/r600_texture.c
index 2d041b0..5ac39aa 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -89,21 +89,21 @@ static unsigned r600_get_block_alignment(struct pipe_screen 
*screen,
        int p_align;
 
        switch(array_mode) {
-       case V_038000_ARRAY_1D_TILED_THIN1:
-               p_align = MAX2(8,
-                              ((rscreen->tiling_info.group_bytes / 8 / 
pixsize)));
-               break;
        case V_038000_ARRAY_2D_TILED_THIN1:
                p_align = MAX2(rscreen->tiling_info.num_banks,
-                              (((rscreen->tiling_info.group_bytes / 8 / 
pixsize)) *
-                               rscreen->tiling_info.num_banks)) * 8;
+                              (((rscreen->tiling_info.group_bytes / 8) / 
pixsize) * rscreen->tiling_info.num_banks)) * 8;
+               /* further restrictions for scanout */
+               p_align = MAX2(rscreen->tiling_info.num_banks * 8, p_align);
                break;
-       case V_038000_ARRAY_LINEAR_ALIGNED:
-               p_align = MAX2(64, rscreen->tiling_info.group_bytes / pixsize);
+       case V_038000_ARRAY_1D_TILED_THIN1:
+               p_align = MAX2(8, (rscreen->tiling_info.group_bytes / (8 * 
pixsize)));
+               /* further restrictions for scanout */
+               p_align = MAX2((rscreen->tiling_info.group_bytes / pixsize), 
p_align);
                break;
+       case V_038000_ARRAY_LINEAR_ALIGNED:
        case V_038000_ARRAY_LINEAR_GENERAL:
        default:
-               p_align = rscreen->tiling_info.group_bytes / pixsize;
+               p_align = MAX2(64, rscreen->tiling_info.group_bytes / pixsize);
                break;
        }
        return p_align;
@@ -121,11 +121,9 @@ static unsigned r600_get_height_alignment(struct 
pipe_screen *screen,
                break;
        case V_038000_ARRAY_1D_TILED_THIN1:
        case V_038000_ARRAY_LINEAR_ALIGNED:
-               h_align = 8;
-               break;
        case V_038000_ARRAY_LINEAR_GENERAL:
        default:
-               h_align = 1;
+               h_align = 8;
                break;
        }
        return h_align;
-- 
1.7.6

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