From: Nicolai Hähnle <nicolai.haeh...@amd.com>
Require LLVM 5.0 or later because LLVM 4.0 is easily fooled into
putting the lane select of llvm.amdgcn.readlane into a VGPR and then
fails to continue to compile.
---
docs/features.txt | 2 +-
docs/relnotes/17.1.0.html | 1 +
src/gallium/drivers/radeonsi/si_pipe.c | 4 +++-
3 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/docs/features.txt b/docs/features.txt
index 1e145e1..662fbd2 100644
--- a/docs/features.txt
+++ b/docs/features.txt
@@ -285,21 +285,21 @@ Khronos, ARB, and OES extensions that are not part of any
OpenGL or OpenGL ES ve
GL_ARB_gl_spirv not started
GL_ARB_gpu_shader_int64 DONE (i965/gen8+,
nvc0, radeonsi, softpipe, llvmpipe)
GL_ARB_indirect_parameters DONE (nvc0, radeonsi)
GL_ARB_parallel_shader_compile not started, but
Chia-I Wu did some related work in 2014
GL_ARB_pipeline_statistics_query DONE (i965, nvc0,
radeonsi, softpipe, swr)
GL_ARB_post_depth_coverage DONE (i965)
GL_ARB_robustness_isolation not started
GL_ARB_sample_locations not started
GL_ARB_seamless_cubemap_per_texture DONE (i965, nvc0,
radeonsi, r600, softpipe, swr)
GL_ARB_shader_atomic_counter_ops DONE (i965/gen7+,
nvc0, radeonsi, softpipe)
- GL_ARB_shader_ballot not started
+ GL_ARB_shader_ballot DONE (radeonsi)
GL_ARB_shader_clock DONE (i965/gen7+,
radeonsi)
GL_ARB_shader_draw_parameters DONE (i965, nvc0,
radeonsi)
GL_ARB_shader_group_vote DONE (nvc0, radeonsi)
GL_ARB_shader_stencil_export DONE (i965/gen9+,
radeonsi, softpipe, llvmpipe, swr)
GL_ARB_shader_viewport_layer_array DONE (i965/gen6+)
GL_ARB_sparse_buffer not started
GL_ARB_sparse_texture not started
GL_ARB_sparse_texture2 not started
GL_ARB_sparse_texture_clamp not started
GL_ARB_texture_filter_minmax not started
diff --git a/docs/relnotes/17.1.0.html b/docs/relnotes/17.1.0.html
index a11a37f..27595f5 100644
--- a/docs/relnotes/17.1.0.html
+++ b/docs/relnotes/17.1.0.html
@@ -38,20 +38,21 @@ TBD.
<h2>New features</h2>
<p>
Note: some of the new features are only available with certain drivers.
</p>
<ul>
<li>GL_ARB_gpu_shader_int64 on i965/gen8+, nvc0, radeonsi, softpipe,
llvmpipe</li>
+<li>GL_ARB_shader_ballot on radeonsi</li>
<li>GL_ARB_shader_clock on radeonsi</li>
<li>GL_ARB_shader_group_vote on radeonsi</li>
<li>GL_ARB_transform_feedback2 on i965/gen6</li>
<li>GL_ARB_transform_feedback_overflow_query on i965/gen6+</li>
<li>Geometry shaders enabled on swr</li>
</ul>
<h2>Bug fixes</h2>
<ul>
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index 9388eb9..e647d3e 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -420,20 +420,23 @@ static int si_get_param(struct pipe_screen* pscreen, enum
pipe_cap param)
return 1;
case PIPE_CAP_INT64:
case PIPE_CAP_INT64_DIVMOD:
case PIPE_CAP_TGSI_CLOCK:
return HAVE_LLVM >= 0x0309;
case PIPE_CAP_TGSI_VOTE:
return HAVE_LLVM >= 0x0400;
+ case PIPE_CAP_TGSI_BALLOT:
+ return HAVE_LLVM >= 0x0500;
+
case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
return !SI_BIG_ENDIAN && sscreen->b.info.has_userptr;
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
return (sscreen->b.info.drm_major == 2 &&
sscreen->b.info.drm_minor >= 43) ||
sscreen->b.info.drm_major == 3;
case PIPE_CAP_TEXTURE_MULTISAMPLE:
/* 2D tiling on CIK is supported since DRM 2.35.0 */
@@ -481,21 +484,20 @@ static int si_get_param(struct pipe_screen* pscreen, enum
pipe_cap param)
case PIPE_CAP_USER_VERTEX_BUFFERS:
case PIPE_CAP_FAKE_SW_MSAA:
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
case PIPE_CAP_VERTEXID_NOBASE:
case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
case PIPE_CAP_MAX_WINDOW_RECTANGLES:
case PIPE_CAP_NATIVE_FENCE_FD:
case PIPE_CAP_TGSI_FS_FBFETCH:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
case PIPE_CAP_UMA:
- case PIPE_CAP_TGSI_BALLOT:
return 0;
case PIPE_CAP_QUERY_BUFFER_OBJECT:
return si_have_tgsi_compute(sscreen);
case PIPE_CAP_DRAW_PARAMETERS:
case PIPE_CAP_MULTI_DRAW_INDIRECT:
case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
return sscreen->has_draw_indirect_multi;
--
2.9.3
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