From: Dave Airlie <airl...@redhat.com>
This just ports the workaround from radeonsi.
Signed-off-by: Dave Airlie <airl...@redhat.com>
---
src/amd/common/ac_nir_to_llvm.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index f8350d8..2828b05 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -2917,9 +2917,17 @@ static void emit_waitcnt(struct nir_to_llvm_context *ctx,
static void emit_barrier(struct nir_to_llvm_context *ctx)
{
- // TODO tess
+ /* SI only (thanks to a hw bug workaround):
+ * The real barrier instruction isn’t needed, because an entire patch
+ * always fits into a single wave.
+ */
+ if (ctx->options->chip_class == SI &&
+ ctx->stage == MESA_SHADER_TESS_CTRL) {
+ emit_waitcnt(ctx, LGKM_CNT & VM_CNT);
+ return;
+ }
ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.s.barrier",
- ctx->voidt, NULL, 0, 0);
+ ctx->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
}
static void emit_discard_if(struct nir_to_llvm_context *ctx,
--
2.9.3
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
