I guess you want GEN_GE(GEN7), no?
On Mar 29, 2017 7:48 AM, "Alejandro Piñeiro" <apinhe...@igalia.com> wrote:
> Technically those hw operations are only available on gen7, as gen8+
> support the conversion on the MOV. But, when using the builder to
> implement nir operations (example: nir_op_fquantize2f16), it is not
> needed to do the gen check. This check is done later, on the final
> emission at brw_F32TO16 (brw_eu_emit), choosing between the MOV or the
> specific operation accordingly.
>
> So in the middle, during optimization phases those hw operations can
> be around for gen8+ too.
>
> Without this patch, several (at least 95) vulkan-cts quantize tests
> crashes when using INTEL_DEBUG=optimizer. For example:
> dEQP-VK.spirv_assembly.instruction.graphics.opquantize.too_small_vert
> ---
> src/intel/compiler/brw_eu.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/intel/compiler/brw_eu.c b/src/intel/compiler/brw_eu.c
> index 77400c1..bff37d7 100644
> --- a/src/intel/compiler/brw_eu.c
> +++ b/src/intel/compiler/brw_eu.c
> @@ -499,10 +499,10 @@ static const struct opcode_desc opcode_descs[128] = {
> .name = "csel", .nsrc = 3, .ndst = 1, .gens = GEN_GE(GEN8),
> },
> [BRW_OPCODE_F32TO16] = {
> - .name = "f32to16", .nsrc = 1, .ndst = 1, .gens = GEN7 | GEN75,
> + .name = "f32to16", .nsrc = 1, .ndst = 1, .gens = GEN7 | GEN75 |
> GEN8 | GEN9,
> },
> [BRW_OPCODE_F16TO32] = {
> - .name = "f16to32", .nsrc = 1, .ndst = 1, .gens = GEN7 | GEN75,
> + .name = "f16to32", .nsrc = 1, .ndst = 1, .gens = GEN7 | GEN75 |
> GEN8 | GEN9,
> },
> /* Reserved - 21-22 */
> [BRW_OPCODE_BFREV] = {
> --
> 2.9.3
>
> _______________________________________________
> mesa-dev mailing list
> mesa-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/mesa-dev
>
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
