From: Marek Olšák <marek.ol...@amd.com> sffbh needs to be suffixed with ".i32" --- src/amd/common/ac_llvm_build.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 5398f07..2f25b14 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -762,21 +762,22 @@ ac_emit_sendmsg(struct ac_llvm_context *ctx, args[1] = wave_id; ac_emit_llvm_intrinsic(ctx, intr_name, ctx->voidt, args, 2, 0); } LLVMValueRef ac_emit_imsb(struct ac_llvm_context *ctx, LLVMValueRef arg, LLVMTypeRef dst_type) { - const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.AMDGPU.flbit.i32" : "llvm.amdgcn.sffbh"; + const char *intr_name = (HAVE_LLVM < 0x0400) ? "llvm.AMDGPU.flbit.i32" : + "llvm.amdgcn.sffbh.i32"; LLVMValueRef msb = ac_emit_llvm_intrinsic(ctx, intr_name, dst_type, &arg, 1, AC_FUNC_ATTR_READNONE); /* The HW returns the last bit index from MSB, but NIR/TGSI wants * the index from LSB. Invert it by doing "31 - msb". */ msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false), msb, ""); LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true); @@ -789,21 +790,21 @@ ac_emit_imsb(struct ac_llvm_context *ctx, return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, ""); } LLVMValueRef ac_emit_umsb(struct ac_llvm_context *ctx, LLVMValueRef arg, LLVMTypeRef dst_type) { LLVMValueRef args[2] = { arg, - LLVMConstInt(ctx->i32, 1, 0), + LLVMConstInt(ctx->i1, 1, 0), }; LLVMValueRef msb = ac_emit_llvm_intrinsic(ctx, "llvm.ctlz.i32", dst_type, args, ARRAY_SIZE(args), AC_FUNC_ATTR_READNONE); /* The HW returns the last bit index from MSB, but TGSI/NIR wants * the index from LSB. Invert it by doing "31 - msb". */ msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false), msb, ""); -- 2.7.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev