Previously, vec4_visitor::setup_payload() stored the location of the
first non-payload GRF in vec4_visitor::first_non_payload_grf, where it
was later picked up by the register allocator. Now setup_payload()
returns the location to the caller (vec4_visitor::run()), which passes
it directly to the register allocator.
This helps pave the way for separating the IR visiting parts of
vec4_visitor (which include setup_payload()) and the code generation
parts (which include the register allocator), by making the data flow
between the two parts more explicit.
---
src/mesa/drivers/dri/i965/brw_vec4.h | 7 +++----
src/mesa/drivers/dri/i965/brw_vec4_emit.cpp | 8 ++++----
.../drivers/dri/i965/brw_vec4_reg_allocate.cpp | 10 +++++-----
3 files changed, 12 insertions(+), 13 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h
b/src/mesa/drivers/dri/i965/brw_vec4.h
index 9c4495a..c546235 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4.h
+++ b/src/mesa/drivers/dri/i965/brw_vec4.h
@@ -321,7 +321,6 @@ public:
int *virtual_grf_sizes;
int virtual_grf_count;
int virtual_grf_array_size;
- int first_non_payload_grf;
int *virtual_grf_def;
int *virtual_grf_use;
dst_reg userplane[MAX_CLIP_PLANES];
@@ -389,9 +388,9 @@ public:
void setup_builtin_uniform_values(ir_variable *ir);
int setup_attributes(int payload_reg);
int setup_uniforms(int payload_reg);
- void setup_payload();
- int reg_allocate_trivial();
- int reg_allocate();
+ int setup_payload();
+ int reg_allocate_trivial(int first_non_payload_grf);
+ int reg_allocate(int first_non_payload_grf);
unsigned move_grf_array_access_to_scratch();
void move_uniform_array_access_to_pull_constants();
void move_push_constants_to_pull_constants();
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
index 061d487..3219fe4 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp
@@ -127,7 +127,7 @@ vec4_visitor::setup_uniforms(int reg)
return reg;
}
-void
+int
vec4_visitor::setup_payload(void)
{
int reg = 0;
@@ -142,7 +142,7 @@ vec4_visitor::setup_payload(void)
reg = setup_attributes(reg);
- this->first_non_payload_grf = reg;
+ return reg;
}
struct brw_reg
@@ -656,8 +656,8 @@ vec4_visitor::run()
if (failed)
return false;
- setup_payload();
- prog_data->total_grf = reg_allocate();
+ int first_non_payload_grf = setup_payload();
+ prog_data->total_grf = reg_allocate(first_non_payload_grf);
if (failed)
return false;
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
index 7848656..f6db9b4 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp
@@ -42,7 +42,7 @@ assign(int *reg_hw_locations, reg *reg)
}
int
-vec4_visitor::reg_allocate_trivial()
+vec4_visitor::reg_allocate_trivial(int first_non_payload_grf)
{
int hw_reg_mapping[this->virtual_grf_count];
bool virtual_grf_used[this->virtual_grf_count];
@@ -68,7 +68,7 @@ vec4_visitor::reg_allocate_trivial()
}
}
- hw_reg_mapping[0] = this->first_non_payload_grf;
+ hw_reg_mapping[0] = first_non_payload_grf;
next = hw_reg_mapping[0] + this->virtual_grf_sizes[0];
for (i = 1; i < this->virtual_grf_count; i++) {
if (virtual_grf_used[i]) {
@@ -142,10 +142,10 @@ brw_alloc_reg_set_for_classes(struct brw_context *brw,
}
int
-vec4_visitor::reg_allocate()
+vec4_visitor::reg_allocate(int first_non_payload_grf)
{
int hw_reg_mapping[virtual_grf_count];
- int first_assigned_grf = this->first_non_payload_grf;
+ int first_assigned_grf = first_non_payload_grf;
int base_reg_count = BRW_MAX_GRF - first_assigned_grf;
int class_sizes[base_reg_count];
int class_count = 0;
@@ -154,7 +154,7 @@ vec4_visitor::reg_allocate()
* register access as a result of broken optimization passes.
*/
if (0) {
- return reg_allocate_trivial();
+ return reg_allocate_trivial(first_non_payload_grf);
}
calculate_live_intervals();
--
1.7.6.4
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