On Fri, Jan 27, 2017 at 10:40 AM, Nicolai Hähnle <nhaeh...@gmail.com> wrote:
> From: Nicolai Hähnle <nicolai.haeh...@amd.com>
>
> Make the cap consistent with PIPE_CAP_INT64.
>
> Aside from the hypothetical case of using draw for vertex shaders (and
> actually caring about doubles...), every implementation supports doubles
> either nowhere or everywhere.
>
> Also, st/mesa didn't even check the cap correctly in all supported
> shader stages.
>
> While at it, add a missing LLVM version check for 64-bit integers in
> radeonsi. This is conservative: judging by the log, LLVM 3.8 might be
> sufficient, but there are probably bugs that have been fixed since then.
> ---
> src/gallium/auxiliary/gallivm/lp_bld_limits.h | 2 --
> src/gallium/auxiliary/tgsi/tgsi_exec.h | 1 -
> src/gallium/docs/source/screen.rst | 5 +++--
> src/gallium/drivers/etnaviv/etnaviv_screen.c | 2 +-
> src/gallium/drivers/freedreno/freedreno_screen.c | 2 +-
> src/gallium/drivers/i915/i915_screen.c | 2 +-
> src/gallium/drivers/llvmpipe/lp_screen.c | 1 +
> src/gallium/drivers/nouveau/nv30/nv30_screen.c | 3 +--
> src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 +-
> src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 3 +--
> src/gallium/drivers/r300/r300_screen.c | 3 +--
> src/gallium/drivers/r600/r600_pipe.c | 9 ++++++++-
> src/gallium/drivers/radeonsi/si_pipe.c | 11 +++++------
> src/gallium/drivers/softpipe/sp_screen.c | 1 +
> src/gallium/drivers/svga/svga_screen.c | 4 +---
> src/gallium/drivers/vc4/vc4_screen.c | 2 +-
> src/gallium/include/pipe/p_defines.h | 2 +-
> src/gallium/state_trackers/clover/core/device.cpp | 3 +--
> src/mesa/state_tracker/st_extensions.c | 5 +----
> 19 files changed, 30 insertions(+), 33 deletions(-)
>
> diff --git a/src/gallium/auxiliary/gallivm/lp_bld_limits.h
> b/src/gallium/auxiliary/gallivm/lp_bld_limits.h
> index d0a5afd..7a4c8e4 100644
> --- a/src/gallium/auxiliary/gallivm/lp_bld_limits.h
> +++ b/src/gallium/auxiliary/gallivm/lp_bld_limits.h
> @@ -126,22 +126,20 @@ gallivm_get_shader_param(enum pipe_shader_cap param)
> return PIPE_MAX_SAMPLERS;
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return PIPE_MAX_SHADER_SAMPLER_VIEWS;
> case PIPE_SHADER_CAP_PREFERRED_IR:
> return PIPE_SHADER_IR_TGSI;
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> return 1 << PIPE_SHADER_IR_TGSI;
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> return 1;
> - case PIPE_SHADER_CAP_DOUBLES:
> - return 1;
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> }
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.h
> b/src/gallium/auxiliary/tgsi/tgsi_exec.h
> index 489b725..d78b3c8 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_exec.h
> +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.h
> @@ -521,21 +521,20 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param)
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> return PIPE_MAX_SAMPLERS;
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return PIPE_MAX_SHADER_SAMPLER_VIEWS;
> case PIPE_SHADER_CAP_PREFERRED_IR:
> return PIPE_SHADER_IR_TGSI;
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> return 1 << PIPE_SHADER_IR_TGSI;
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> return 1;
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> return 1;
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> return PIPE_MAX_SHADER_BUFFERS;
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> diff --git a/src/gallium/docs/source/screen.rst
> b/src/gallium/docs/source/screen.rst
> index 2bfcd9f..4f5b4bb 100644
> --- a/src/gallium/docs/source/screen.rst
> +++ b/src/gallium/docs/source/screen.rst
> @@ -366,20 +366,23 @@ The integer capabilities:
> ARB_transform_feedback3.
> * ``PIPE_CAP_TGSI_CAN_READ_OUTPUTS``: Whether every TGSI shader stage can
> read
> from the output file.
> * ``PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY``: Tell the GLSL compiler to use
> the minimum amount of optimizations just to be able to do all the linking
> and lowering.
> * ``PIPE_CAP_TGSI_FS_FBFETCH``: Whether a fragment shader can use the FBFETCH
> opcode to retrieve the current value in the framebuffer.
> * ``PIPE_CAP_TGSI_MUL_ZERO_WINS``: Whether TGSI shaders support the
> ``TGSI_PROPERTY_MUL_ZERO_WINS`` shader property.
> +* ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations
> + are supported.
> +* ``PIPE_CAP_INT64``: Whether 64-bit integer operations are supported.
>
>
> .. _pipe_capf:
>
> PIPE_CAPF_*
> ^^^^^^^^^^^^^^^^
>
> The floating-point capabilities are:
>
> * ``PIPE_CAPF_MAX_LINE_WIDTH``: The maximum width of a regular line.
> @@ -444,22 +447,20 @@ to be 0.
> * ``PIPE_SHADER_CAP_SUBROUTINES``: Whether subroutines are supported, i.e.
> BGNSUB, ENDSUB, CAL, and RET, including RET in the main block.
> * ``PIPE_SHADER_CAP_INTEGERS``: Whether integer opcodes are supported.
> If unsupported, only float opcodes are supported.
> * ``PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS``: The maximum number of texture
> samplers.
> * ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the
> program. It should be one of the ``pipe_shader_ir`` enum values.
> * ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture
> sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS.
> -* ``PIPE_SHADER_CAP_DOUBLES``: Whether double precision floating-point
> - operations are supported.
> * ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision
> rounding
> is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used.
> * ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and
> DLDEXP are supported.
> * ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only)
> are supported.
> * ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't
> ignore tgsi_declaration_range::Last for shader inputs and outputs.
> * ``PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT``: This is the maximum number
> of iterations that loops are allowed to have to be unrolled. It is only
> diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c
> b/src/gallium/drivers/etnaviv/etnaviv_screen.c
> index c045f7e..0ad9661 100644
> --- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
> +++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
> @@ -234,20 +234,21 @@ etna_screen_get_param(struct pipe_screen *pscreen, enum
> pipe_cap param)
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
> case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
> case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
> case PIPE_CAP_NATIVE_FENCE_FD:
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> case PIPE_CAP_TGSI_FS_FBFETCH:
> case PIPE_CAP_TGSI_MUL_ZERO_WINS:
> + case PIPE_CAP_DOUBLES:
> case PIPE_CAP_INT64:
> return 0;
>
> /* Stream output. */
> case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
> case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
> case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
> case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
> return 0;
>
> @@ -408,21 +409,20 @@ etna_screen_get_shader_param(struct pipe_screen
> *pscreen, unsigned shader,
> return 0;
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return shader == PIPE_SHADER_FRAGMENT
> ? screen->specs.fragment_sampler_count
> : screen->specs.vertex_sampler_count;
> case PIPE_SHADER_CAP_PREFERRED_IR:
> return PIPE_SHADER_IR_TGSI;
> case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
> return 4096;
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> return false;
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c
> b/src/gallium/drivers/freedreno/freedreno_screen.c
> index abb8787..bc8a277 100644
> --- a/src/gallium/drivers/freedreno/freedreno_screen.c
> +++ b/src/gallium/drivers/freedreno/freedreno_screen.c
> @@ -291,20 +291,21 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum
> pipe_cap param)
> case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
> case PIPE_CAP_TGSI_VOTE:
> case PIPE_CAP_MAX_WINDOW_RECTANGLES:
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> case PIPE_CAP_TGSI_FS_FBFETCH:
> case PIPE_CAP_TGSI_MUL_ZERO_WINS:
> + case PIPE_CAP_DOUBLES:
> case PIPE_CAP_INT64:
> return 0;
>
> case PIPE_CAP_MAX_VIEWPORTS:
> return 1;
>
> case PIPE_CAP_SHAREABLE_SHADERS:
> /* manage the variants for these ourself, to avoid breaking
> precompile: */
> case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
> case PIPE_CAP_VERTEX_COLOR_CLAMPED:
> @@ -480,21 +481,20 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
> unsigned shader,
> * everything is just normal registers. This is just
> temporary
> * hack until load_input/store_output handle arrays in a
> similar
> * way as load_var/store_var..
> */
> return 0;
> case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
> /* a2xx compiler doesn't handle indirect: */
> return is_ir3(screen) ? 1 : 0;
> case PIPE_SHADER_CAP_SUBROUTINES:
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> return 0;
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> return 1;
> case PIPE_SHADER_CAP_INTEGERS:
> if (glsl120)
> return 0;
> diff --git a/src/gallium/drivers/i915/i915_screen.c
> b/src/gallium/drivers/i915/i915_screen.c
> index 07d1488..76f20fc 100644
> --- a/src/gallium/drivers/i915/i915_screen.c
> +++ b/src/gallium/drivers/i915/i915_screen.c
> @@ -154,21 +154,20 @@ i915_get_shader_param(struct pipe_screen *screen,
> unsigned shader, enum pipe_sha
> case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
> return 1;
> case PIPE_SHADER_CAP_SUBROUTINES:
> return 0;
> case PIPE_SHADER_CAP_INTEGERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return I915_TEX_UNITS;
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> default:
> debug_printf("%s: Unknown cap %u.\n", __FUNCTION__, cap);
> return 0;
> @@ -292,20 +291,21 @@ i915_get_param(struct pipe_screen *screen, enum
> pipe_cap cap)
> case PIPE_CAP_MULTI_DRAW_INDIRECT:
> case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
> case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
> case PIPE_CAP_SAMPLER_VIEW_TARGET:
> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
> case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
> case PIPE_CAP_NATIVE_FENCE_FD:
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> case PIPE_CAP_TGSI_FS_FBFETCH:
> case PIPE_CAP_TGSI_MUL_ZERO_WINS:
> + case PIPE_CAP_DOUBLES:
> case PIPE_CAP_INT64:
> return 0;
>
> case PIPE_CAP_MAX_VIEWPORTS:
> return 1;
>
> case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
> return 64;
>
> case PIPE_CAP_GLSL_FEATURE_LEVEL:
> diff --git a/src/gallium/drivers/llvmpipe/lp_screen.c
> b/src/gallium/drivers/llvmpipe/lp_screen.c
> index 0982c35..0b12119 100644
> --- a/src/gallium/drivers/llvmpipe/lp_screen.c
> +++ b/src/gallium/drivers/llvmpipe/lp_screen.c
> @@ -260,20 +260,21 @@ llvmpipe_get_param(struct pipe_screen *screen, enum
> pipe_cap param)
> case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
> return 1;
> case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
> return 0;
> case PIPE_CAP_SAMPLER_VIEW_TARGET:
> return 1;
> case PIPE_CAP_FAKE_SW_MSAA:
> return 1;
> case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> + case PIPE_CAP_DOUBLES:
> case PIPE_CAP_INT64:
> return 1;
>
> case PIPE_CAP_VENDOR_ID:
> return 0xFFFFFFFF;
> case PIPE_CAP_DEVICE_ID:
> return 0xFFFFFFFF;
> case PIPE_CAP_ACCELERATED:
> return 0;
> case PIPE_CAP_VIDEO_MEMORY: {
> diff --git a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
> b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
> index 2451e01..b43d852 100644
> --- a/src/gallium/drivers/nouveau/nv30/nv30_screen.c
> +++ b/src/gallium/drivers/nouveau/nv30/nv30_screen.c
> @@ -201,20 +201,21 @@ nv30_screen_get_param(struct pipe_screen *pscreen, enum
> pipe_cap param)
> case PIPE_CAP_MAX_WINDOW_RECTANGLES:
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
> case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
> case PIPE_CAP_NATIVE_FENCE_FD:
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> case PIPE_CAP_TGSI_FS_FBFETCH:
> case PIPE_CAP_TGSI_MUL_ZERO_WINS:
> + case PIPE_CAP_DOUBLES:
> case PIPE_CAP_INT64:
> return 0;
>
> case PIPE_CAP_VENDOR_ID:
> return 0x10de;
> case PIPE_CAP_DEVICE_ID: {
> uint64_t device_id;
> if (nouveau_getparam(dev, NOUVEAU_GETPARAM_PCI_DEVICE, &device_id)) {
> NOUVEAU_ERR("NOUVEAU_GETPARAM_PCI_DEVICE failed.\n");
> return -1;
> @@ -292,21 +293,20 @@ nv30_screen_get_shader_param(struct pipe_screen
> *pscreen, unsigned shader,
> return 0;
> case PIPE_SHADER_CAP_MAX_PREDS:
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
> case PIPE_SHADER_CAP_SUBROUTINES:
> case PIPE_SHADER_CAP_INTEGERS:
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> default:
> debug_printf("unknown vertex shader param %d\n", param);
> @@ -341,21 +341,20 @@ nv30_screen_get_shader_param(struct pipe_screen
> *pscreen, unsigned shader,
> return PIPE_SHADER_IR_TGSI;
> case PIPE_SHADER_CAP_MAX_PREDS:
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
> case PIPE_SHADER_CAP_SUBROUTINES:
> case PIPE_SHADER_CAP_INTEGERS:
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> default:
> debug_printf("unknown fragment shader param %d\n", param);
> diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> index cab0ce6..32c3de3 100644
> --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c
> @@ -253,20 +253,21 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum
> pipe_cap param)
> case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
> case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
> case PIPE_CAP_TGSI_VOTE:
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
> case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
> case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
> case PIPE_CAP_NATIVE_FENCE_FD:
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> case PIPE_CAP_TGSI_FS_FBFETCH:
> + case PIPE_CAP_DOUBLES:
> case PIPE_CAP_INT64:
> return 0;
>
> case PIPE_CAP_VENDOR_ID:
> return 0x10de;
> case PIPE_CAP_DEVICE_ID: {
> uint64_t device_id;
> if (nouveau_getparam(dev, NOUVEAU_GETPARAM_PCI_DEVICE, &device_id)) {
> NOUVEAU_ERR("NOUVEAU_GETPARAM_PCI_DEVICE failed.\n");
> return -1;
> @@ -336,21 +337,20 @@ nv50_screen_get_shader_param(struct pipe_screen
> *pscreen, unsigned shader,
> case PIPE_SHADER_CAP_INTEGERS:
> return 1;
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> /* The chip could handle more sampler views than samplers */
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return MIN2(16, PIPE_MAX_SAMPLERS);
> case PIPE_SHADER_CAP_PREFERRED_IR:
> return PIPE_SHADER_IR_TGSI;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> default:
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index 8388599..b995cde 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> @@ -236,20 +236,21 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum
> pipe_cap param)
> case PIPE_CAP_INVALIDATE_BUFFER:
> case PIPE_CAP_STRING_MARKER:
> case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
> case PIPE_CAP_CULL_DISTANCE:
> case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
> case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
> case PIPE_CAP_TGSI_VOTE:
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_TGSI_MUL_ZERO_WINS:
> + case PIPE_CAP_DOUBLES:
> return 1;
> case PIPE_CAP_COMPUTE:
> return (class_3d < GP100_3D_CLASS);
> case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
> return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
> case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
> return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0;
> case PIPE_CAP_TGSI_FS_FBFETCH:
> return class_3d >= NVE4_3D_CLASS; /* needs testing on fermi */
>
> @@ -366,22 +367,20 @@ nvc0_screen_get_shader_param(struct pipe_screen
> *pscreen, unsigned shader,
> case PIPE_SHADER_CAP_MAX_TEMPS:
> return NVC0_CAP_MAX_PROGRAM_TEMPS;
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> return 1;
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> return 1;
> case PIPE_SHADER_CAP_SUBROUTINES:
> return 1;
> case PIPE_SHADER_CAP_INTEGERS:
> return 1;
> - case PIPE_SHADER_CAP_DOUBLES:
> - return 1;
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> return 1;
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> return 1;
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> return NVC0_MAX_BUFFERS;
> diff --git a/src/gallium/drivers/r300/r300_screen.c
> b/src/gallium/drivers/r300/r300_screen.c
> index 3e927e8..1410740 100644
> --- a/src/gallium/drivers/r300/r300_screen.c
> +++ b/src/gallium/drivers/r300/r300_screen.c
> @@ -223,20 +223,21 @@ static int r300_get_param(struct pipe_screen* pscreen,
> enum pipe_cap param)
> case PIPE_CAP_TGSI_VOTE:
> case PIPE_CAP_MAX_WINDOW_RECTANGLES:
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
> case PIPE_CAP_NATIVE_FENCE_FD:
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> case PIPE_CAP_TGSI_FS_FBFETCH:
> case PIPE_CAP_TGSI_MUL_ZERO_WINS:
> + case PIPE_CAP_DOUBLES:
> case PIPE_CAP_INT64:
> return 0;
>
> /* SWTCL-only features. */
> case PIPE_CAP_PRIMITIVE_RESTART:
> case PIPE_CAP_USER_VERTEX_BUFFERS:
> case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
> return !r300screen->caps.has_tcl;
>
> /* HWTCL-only features / limitations. */
> @@ -332,21 +333,20 @@ static int r300_get_shader_param(struct pipe_screen
> *pscreen, unsigned shader, e
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return r300screen->caps.num_tex_units;
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
> case PIPE_SHADER_CAP_SUBROUTINES:
> case PIPE_SHADER_CAP_INTEGERS:
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> case PIPE_SHADER_CAP_PREFERRED_IR:
> @@ -395,21 +395,20 @@ static int r300_get_shader_param(struct pipe_screen
> *pscreen, unsigned shader, e
> case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
> case PIPE_SHADER_CAP_SUBROUTINES:
> case PIPE_SHADER_CAP_INTEGERS:
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> case PIPE_SHADER_CAP_PREFERRED_IR:
> diff --git a/src/gallium/drivers/r600/r600_pipe.c
> b/src/gallium/drivers/r600/r600_pipe.c
> index d48c566..30fbee2 100644
> --- a/src/gallium/drivers/r600/r600_pipe.c
> +++ b/src/gallium/drivers/r600/r600_pipe.c
> @@ -375,20 +375,28 @@ static int r600_get_param(struct pipe_screen* pscreen,
> enum pipe_cap param)
> case PIPE_CAP_TGSI_VOTE:
> case PIPE_CAP_MAX_WINDOW_RECTANGLES:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
> case PIPE_CAP_NATIVE_FENCE_FD:
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> case PIPE_CAP_TGSI_FS_FBFETCH:
> case PIPE_CAP_INT64:
> return 0;
>
> + case PIPE_CAP_DOUBLES:
> + if (rscreen->b.family == CHIP_ARUBA ||
> + rscreen->b.family == CHIP_CAYMAN ||
> + rscreen->b.family == CHIP_CYPRESS ||
> + rscreen->b.family == CHIP_HEMLOCK)
> + return 1;
> + return 0;
> +
> case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
> if (family >= CHIP_CEDAR)
> return 30;
> else
> return 0;
> /* Stream output. */
> case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
> return rscreen->b.has_streamout ? 4 : 0;
> case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
> case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
> @@ -549,21 +557,20 @@ static int r600_get_shader_param(struct pipe_screen*
> pscreen, unsigned shader, e
> return 16;
> case PIPE_SHADER_CAP_PREFERRED_IR:
> if (shader == PIPE_SHADER_COMPUTE) {
> return PIPE_SHADER_IR_NATIVE;
> } else {
> return PIPE_SHADER_IR_TGSI;
> }
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> return 0;
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> - case PIPE_SHADER_CAP_DOUBLES:
> if (rscreen->b.family == CHIP_ARUBA ||
> rscreen->b.family == CHIP_CAYMAN ||
> rscreen->b.family == CHIP_CYPRESS ||
> rscreen->b.family == CHIP_HEMLOCK)
> return 1;
> return 0;
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
> b/src/gallium/drivers/radeonsi/si_pipe.c
> index 1fe8b9f..67b5020 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -407,23 +407,27 @@ static int si_get_param(struct pipe_screen* pscreen,
> enum pipe_cap param)
> case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
> case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
> case PIPE_CAP_GENERATE_MIPMAP:
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> case PIPE_CAP_STRING_MARKER:
> case PIPE_CAP_CLEAR_TEXTURE:
> case PIPE_CAP_CULL_DISTANCE:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> - case PIPE_CAP_INT64:
> return 1;
>
> + case PIPE_CAP_DOUBLES:
> + return HAVE_LLVM >= 0x0307;
> + case PIPE_CAP_INT64:
> + return HAVE_LLVM >= 0x0309;
> +
> case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
> return !SI_BIG_ENDIAN && sscreen->b.info.has_userptr;
>
> case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
> return (sscreen->b.info.drm_major == 2 &&
> sscreen->b.info.drm_minor >= 43) ||
> sscreen->b.info.drm_major == 3;
>
> case PIPE_CAP_TEXTURE_MULTISAMPLE:
> /* 2D tiling on CIK is supported since DRM 2.35.0 */
> @@ -584,22 +588,20 @@ static int si_get_shader_param(struct pipe_screen*
> pscreen, unsigned shader, enu
> return PIPE_SHADER_IR_NATIVE;
>
> case PIPE_SHADER_CAP_SUPPORTED_IRS: {
> int ir = 1 << PIPE_SHADER_IR_NATIVE;
>
> if (si_have_tgsi_compute(sscreen))
> ir |= 1 << PIPE_SHADER_IR_TGSI;
>
> return ir;
> }
> - case PIPE_SHADER_CAP_DOUBLES:
> - return HAVE_LLVM >= 0x0307;
>
> case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE: {
> uint64_t max_const_buffer_size;
> pscreen->get_compute_param(pscreen,
> PIPE_SHADER_IR_TGSI,
> PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
> &max_const_buffer_size);
> return MIN2(max_const_buffer_size, INT_MAX);
> }
> default:
> /* If compute shaders don't require a special value
> @@ -648,23 +650,20 @@ static int si_get_shader_param(struct pipe_screen*
> pscreen, unsigned shader, enu
> case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
> case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
> case PIPE_SHADER_CAP_INTEGERS:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> return 1;
>
> - case PIPE_SHADER_CAP_DOUBLES:
> - return HAVE_LLVM >= 0x0307;
> -
> case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
> /* TODO: Indirection of geometry shader input dimension is not
> * handled yet
> */
> return shader != PIPE_SHADER_GEOMETRY;
>
> /* Unsupported boolean features. */
> case PIPE_SHADER_CAP_MAX_PREDS:
> case PIPE_SHADER_CAP_SUBROUTINES:
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> diff --git a/src/gallium/drivers/softpipe/sp_screen.c
> b/src/gallium/drivers/softpipe/sp_screen.c
> index ec530a4..fd7ce25 100644
> --- a/src/gallium/drivers/softpipe/sp_screen.c
> +++ b/src/gallium/drivers/softpipe/sp_screen.c
> @@ -158,20 +158,21 @@ softpipe_get_param(struct pipe_screen *screen, enum
> pipe_cap param)
> case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
> return 0;
> case PIPE_CAP_COMPUTE:
> return 1;
> case PIPE_CAP_USER_VERTEX_BUFFERS:
> case PIPE_CAP_USER_INDEX_BUFFERS:
> case PIPE_CAP_USER_CONSTANT_BUFFERS:
> case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
> case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
> case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
> + case PIPE_CAP_DOUBLES:
> case PIPE_CAP_INT64:
> return 1;
> case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
> return 16;
> case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
> case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
> case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
> case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
> case PIPE_CAP_TEXTURE_MULTISAMPLE:
> return 0;
> diff --git a/src/gallium/drivers/svga/svga_screen.c
> b/src/gallium/drivers/svga/svga_screen.c
> index 85b3b63..f404fb5 100644
> --- a/src/gallium/drivers/svga/svga_screen.c
> +++ b/src/gallium/drivers/svga/svga_screen.c
> @@ -417,20 +417,21 @@ svga_get_param(struct pipe_screen *screen, enum
> pipe_cap param)
> case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
> case PIPE_CAP_TGSI_VOTE:
> case PIPE_CAP_MAX_WINDOW_RECTANGLES:
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> case PIPE_CAP_TGSI_FS_FBFETCH:
> case PIPE_CAP_TGSI_MUL_ZERO_WINS:
> + case PIPE_CAP_DOUBLES:
> case PIPE_CAP_INT64:
> return 0;
> }
>
> debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
> return 0;
> }
>
>
> static int
> @@ -491,21 +492,20 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
> unsigned shader,
> return 0;
> case PIPE_SHADER_CAP_INTEGERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return 16;
> case PIPE_SHADER_CAP_PREFERRED_IR:
> return PIPE_SHADER_IR_TGSI;
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> return 0;
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> @@ -554,21 +554,20 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
> unsigned shader,
> return 0;
> case PIPE_SHADER_CAP_INTEGERS:
> return 0;
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return 0;
> case PIPE_SHADER_CAP_PREFERRED_IR:
> return PIPE_SHADER_IR_TGSI;
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> return 0;
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> @@ -650,21 +649,20 @@ vgpu10_get_shader_param(struct pipe_screen *screen,
> unsigned shader,
> case PIPE_SHADER_CAP_SUBROUTINES:
> case PIPE_SHADER_CAP_INTEGERS:
> return TRUE;
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return SVGA3D_DX_MAX_SAMPLERS;
> case PIPE_SHADER_CAP_PREFERRED_IR:
> return PIPE_SHADER_IR_TGSI;
> case PIPE_SHADER_CAP_SUPPORTED_IRS:
> return 0;
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
> case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
> case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
> return 0;
> case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
> return 32;
> diff --git a/src/gallium/drivers/vc4/vc4_screen.c
> b/src/gallium/drivers/vc4/vc4_screen.c
> index bf21982..dc44f2a 100644
> --- a/src/gallium/drivers/vc4/vc4_screen.c
> +++ b/src/gallium/drivers/vc4/vc4_screen.c
> @@ -237,20 +237,21 @@ vc4_screen_get_param(struct pipe_screen *pscreen, enum
> pipe_cap param)
> case PIPE_CAP_TGSI_VOTE:
> case PIPE_CAP_MAX_WINDOW_RECTANGLES:
> case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
> case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
> case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
> case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
> case PIPE_CAP_NATIVE_FENCE_FD:
> case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
> case PIPE_CAP_TGSI_FS_FBFETCH:
> case PIPE_CAP_TGSI_MUL_ZERO_WINS:
> + case PIPE_CAP_DOUBLES:
> case PIPE_CAP_INT64:
> return 0;
>
> /* Stream output. */
> case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
> case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
> case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
> case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
> case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
> return 0;
> @@ -384,21 +385,20 @@ vc4_screen_get_shader_param(struct pipe_screen
> *pscreen, unsigned shader,
> case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
> return 0;
> case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
> return 1;
> case PIPE_SHADER_CAP_SUBROUTINES:
> return 0;
> case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
> return 0;
> case PIPE_SHADER_CAP_INTEGERS:
> return 1;
> - case PIPE_SHADER_CAP_DOUBLES:
> case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
> case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
> return 0;
> case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
> case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
> return VC4_MAX_TEXTURE_SAMPLERS;
> case PIPE_SHADER_CAP_PREFERRED_IR:
> return PIPE_SHADER_IR_NIR;
> diff --git a/src/gallium/include/pipe/p_defines.h
> b/src/gallium/include/pipe/p_defines.h
> index ff497bc..9915957 100644
> --- a/src/gallium/include/pipe/p_defines.h
> +++ b/src/gallium/include/pipe/p_defines.h
> @@ -745,20 +745,21 @@ enum pipe_cap
> PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED,
> PIPE_CAP_VIEWPORT_SUBPIXEL_BITS,
> PIPE_CAP_MIXED_COLOR_DEPTH_BITS,
> PIPE_CAP_TGSI_ARRAY_COMPONENTS,
> PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS,
> PIPE_CAP_TGSI_CAN_READ_OUTPUTS,
> PIPE_CAP_NATIVE_FENCE_FD,
> PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY,
> PIPE_CAP_TGSI_FS_FBFETCH,
> PIPE_CAP_TGSI_MUL_ZERO_WINS,
> + PIPE_CAP_DOUBLES,
> PIPE_CAP_INT64,
> };
>
> #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0)
> #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 (1 << 1)
>
> enum pipe_endian
> {
> PIPE_ENDIAN_LITTLE = 0,
> PIPE_ENDIAN_BIG = 1,
> @@ -806,21 +807,20 @@ enum pipe_shader_cap
> PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR,
> PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR,
> PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR,
> PIPE_SHADER_CAP_INDIRECT_CONST_ADDR,
> PIPE_SHADER_CAP_SUBROUTINES, /* BGNSUB, ENDSUB, CAL, RET */
> PIPE_SHADER_CAP_INTEGERS,
> PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS,
> PIPE_SHADER_CAP_PREFERRED_IR,
> PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED,
> PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS,
> - PIPE_SHADER_CAP_DOUBLES,
> PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED, /* all rounding modes */
> PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED,
> PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED,
> PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE,
> PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT,
> PIPE_SHADER_CAP_MAX_SHADER_BUFFERS,
> PIPE_SHADER_CAP_SUPPORTED_IRS,
> PIPE_SHADER_CAP_MAX_SHADER_IMAGES,
> PIPE_SHADER_CAP_LOWER_IF_THRESHOLD,
> };
> diff --git a/src/gallium/state_trackers/clover/core/device.cpp
> b/src/gallium/state_trackers/clover/core/device.cpp
> index 8f1c1da..7d11979 100644
> --- a/src/gallium/state_trackers/clover/core/device.cpp
> +++ b/src/gallium/state_trackers/clover/core/device.cpp
> @@ -179,22 +179,21 @@ device::max_compute_units() const {
> }
>
> bool
> device::image_support() const {
> return get_compute_param<uint32_t>(pipe, ir_format(),
> PIPE_COMPUTE_CAP_IMAGES_SUPPORTED)[0];
> }
>
> bool
> device::has_doubles() const {
> - return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
> - PIPE_SHADER_CAP_DOUBLES);
> + return pipe->get_param(pipe, PIPE_SHADER_CAP_DOUBLES);
This should be PIPE_CAP_DOUBLES. With that fixed:
Reviewed-by: Marek Olšák <marek.ol...@amd.com>
Marek
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