I'd swear that I wrote a nearly identical patch almost 2 years ago.
The work that depended on it fizzled, so I never sent it out. The one
difference is I had the following comment:
/* We assume that Boolean true and false are 1.0 and 0.0. OPCODE_CMP
* selects src1 if src0 is < 0, src2 otherwise.
*/
Either way, this patch is
Reviewed-by: Ian Romanick <ian.d.roman...@intel.com>
On 01/24/2017 03:26 PM, Francisco Jerez wrote:
> This will be used internally by the GLSL front-end in order to
> implement some built-in functions. Plumb it through MESA IR for
> back-ends that rely on this translation pass.
> ---
> src/mesa/program/ir_to_mesa.cpp | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp
> index 0ae797f..5ff7304 100644
> --- a/src/mesa/program/ir_to_mesa.cpp
> +++ b/src/mesa/program/ir_to_mesa.cpp
> @@ -1360,13 +1360,17 @@ ir_to_mesa_visitor::visit(ir_expression *ir)
> emit(ir, OPCODE_LRP, result_dst, op[2], op[1], op[0]);
> break;
>
> + case ir_triop_csel:
> + op[0].negate = ~op[0].negate;
> + emit(ir, OPCODE_CMP, result_dst, op[0], op[1], op[2]);
> + break;
> +
> case ir_binop_vector_extract:
> case ir_triop_fma:
> case ir_triop_bitfield_extract:
> case ir_triop_vector_insert:
> case ir_quadop_bitfield_insert:
> case ir_binop_ldexp:
> - case ir_triop_csel:
> case ir_binop_carry:
> case ir_binop_borrow:
> case ir_binop_imul_high:
>
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