Reviewed-by: Ilia Mirkin <imir...@alum.mit.edu>
On Mon, Jan 16, 2017 at 11:20 AM, Nicolai Hähnle <nhaeh...@gmail.com> wrote:
> From: Nicolai Hähnle <nicolai.haeh...@amd.com>
>
> Double-precision division, to allow more precision than a DRCP + DMUL
> sequence.
> ---
> src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c | 2 ++
> src/gallium/auxiliary/tgsi/tgsi_info.c | 2 ++
> src/gallium/docs/source/tgsi.rst | 9 +++++++++
> src/gallium/include/pipe/p_shader_tokens.h | 5 ++++-
> 4 files changed, 17 insertions(+), 1 deletion(-)
>
> diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
> b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
> index 91e959f..937170f 100644
> --- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
> +++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi_action.c
> @@ -1355,6 +1355,7 @@ lp_set_default_actions(struct lp_build_tgsi_context *
> bld_base)
> bld_base->op_actions[TGSI_OPCODE_DMAX].emit = fmax_emit;
> bld_base->op_actions[TGSI_OPCODE_DMIN].emit = fmin_emit;
> bld_base->op_actions[TGSI_OPCODE_DMUL].emit = mul_emit;
> + bld_base->op_actions[TGSI_OPCODE_DDIV].emit = fdiv_emit;
>
> bld_base->op_actions[TGSI_OPCODE_D2F].emit = d2f_emit;
> bld_base->op_actions[TGSI_OPCODE_D2I].emit = d2i_emit;
> @@ -2623,6 +2624,7 @@ lp_set_default_actions_cpu(
> bld_base->op_actions[TGSI_OPCODE_DSLT].emit = dslt_emit_cpu;
> bld_base->op_actions[TGSI_OPCODE_DSNE].emit = dsne_emit_cpu;
>
> + bld_base->op_actions[TGSI_OPCODE_DDIV].emit = div_emit_cpu;
> bld_base->op_actions[TGSI_OPCODE_DRSQ].emit = drecip_sqrt_emit_cpu;
> bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = dsqrt_emit_cpu;
>
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c
> b/src/gallium/auxiliary/tgsi/tgsi_info.c
> index a339ec2..3bec561 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_info.c
> +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
> @@ -287,6 +287,7 @@ static const struct tgsi_opcode_info
> opcode_info[TGSI_OPCODE_LAST] =
> { 1, 2, 0, 0, 0, 0, 0, COMP, "U64DIV", TGSI_OPCODE_U64DIV },
> { 1, 2, 0, 0, 0, 0, 0, COMP, "I64MOD", TGSI_OPCODE_I64MOD },
> { 1, 2, 0, 0, 0, 0, 0, COMP, "U64MOD", TGSI_OPCODE_U64MOD },
> + { 1, 2, 0, 0, 0, 0, 0, COMP, "DDIV", TGSI_OPCODE_DDIV },
> };
>
> const struct tgsi_opcode_info *
> @@ -417,6 +418,7 @@ tgsi_opcode_infer_type( uint opcode )
> case TGSI_OPCODE_DNEG:
> case TGSI_OPCODE_DMUL:
> case TGSI_OPCODE_DMAX:
> + case TGSI_OPCODE_DDIV:
> case TGSI_OPCODE_DMIN:
> case TGSI_OPCODE_DRCP:
> case TGSI_OPCODE_DSQRT:
> diff --git a/src/gallium/docs/source/tgsi.rst
> b/src/gallium/docs/source/tgsi.rst
> index d2d30b4..3e2d0e9 100644
> --- a/src/gallium/docs/source/tgsi.rst
> +++ b/src/gallium/docs/source/tgsi.rst
> @@ -2005,6 +2005,15 @@ Perform a * b + c with no intermediate rounding step.
> dst.zw = src0.zw \times src1.zw + src2.zw
>
>
> +.. opcode:: DDIV - Divide
> +
> +.. math::
> +
> + dst.xy = \frac{src0.xy}{src1.xy}
> +
> + dst.zw = \frac{src0.zw}{src1.zw}
> +
> +
> .. opcode:: DRCP - Reciprocal
>
> .. math::
> diff --git a/src/gallium/include/pipe/p_shader_tokens.h
> b/src/gallium/include/pipe/p_shader_tokens.h
> index 3384035..a867d13 100644
> --- a/src/gallium/include/pipe/p_shader_tokens.h
> +++ b/src/gallium/include/pipe/p_shader_tokens.h
> @@ -601,7 +601,10 @@ struct tgsi_property_data {
> #define TGSI_OPCODE_U64DIV 245
> #define TGSI_OPCODE_I64MOD 246
> #define TGSI_OPCODE_U64MOD 247
> -#define TGSI_OPCODE_LAST 248
> +
> +#define TGSI_OPCODE_DDIV 248
> +
> +#define TGSI_OPCODE_LAST 249
>
> /**
> * Opcode is the operation code to execute. A given operation defines the
> --
> 2.7.4
>
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