On Mon, Jan 02, 2017 at 06:37:13PM -0800, Ben Widawsky wrote:
> v2: Leave "image+mod" (Topi)
>
> Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
> Acked-by: Daniel Stone <dani...@collabora.com>
> ---
> src/mesa/drivers/dri/i965/intel_screen.c | 33
> ++++++++++++++++++++++++++++----
> 1 file changed, 29 insertions(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/intel_screen.c
> b/src/mesa/drivers/dri/i965/intel_screen.c
> index 153542c1d1..805de5b461 100644
> --- a/src/mesa/drivers/dri/i965/intel_screen.c
> +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> @@ -549,6 +549,7 @@ create_image_with_modifier(struct intel_screen *screen,
> uint32_t requested_tiling = 0, tiling = 0;
> unsigned long pitch;
> unsigned tiled_height = 0;
> + unsigned ccs_height = 0;
You could add a short note into the commit message that ccs_height is left
zero, and that it will be hooked in later. Patch title makes one believe that
something gets effective. Either way:
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
>
> switch (modifier) {
> case I915_FORMAT_MOD_Y_TILED:
> @@ -566,10 +567,33 @@ create_image_with_modifier(struct intel_screen *screen,
> /* For now, all modifiers require some tiling */
> assert(tiling);
>
> + /*
> + * CCS width is always going to be less than or equal to the image's
> width.
> + * All we need to do is make sure we add extra rows (height) for the CCS.
> + *
> + * A pair of CCS bits correspond to 8x4 pixels, and must be cacheline
> + * granularity. Each CCS tile is laid out in 8b strips, which corresponds
> to
> + * 1024x512 pixel region. In memory, it looks like the following:
> + *
> + * ?????????????????????????????????????????????????????????
> + * ??? ???
> + * ??? ???
> + * ??? ???
> + * ??? Image ???
> + * ??? ???
> + * ??? ???
> + * ???xxxxxxxxxxxxxxxxx???
> + * ?????????????????????????????????????????????????????????
> + * ??? ??? |
> + * ???ccs ??? unused |
> + * ?????????????????????-----------???
> + * <------pitch------>
> + */
> cpp = _mesa_get_format_bytes(image->format);
> - image->bo = drm_intel_bo_alloc_tiled(screen->bufmgr, "image+mod",
> - width, tiled_height, cpp, &tiling,
> - &pitch, 0);
> + image->bo = drm_intel_bo_alloc_tiled(screen->bufmgr,
> + ccs_height ? "image+ccs" :
> "image+mod",
> + width, tiled_height + ccs_height,
> + cpp, &tiling, &pitch, 0);
> if (image->bo == NULL)
> return false;
>
> @@ -587,7 +611,8 @@ create_image_with_modifier(struct intel_screen *screen,
> if (image->planar_format)
> assert(image->planar_format->nplanes == 1);
>
> - image->aux_offset = 0; /* y_tiled_height * pitch; */
> + if (ccs_height)
> + image->aux_offset = tiled_height * pitch /* + mt->offset */;
>
> return true;
> }
> --
> 2.11.0
>
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