Needed when accessing a comrpessed texture as R32G32B32A32 from a shader. This
was not encountered previously, as we used the CB for the reinterpretation,
which
does not use this pitch.
Signed-off-by: Bas Nieuwenhuizen <ba...@google.com>
---
src/amd/vulkan/radv_image.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index c6318f2882..fee98ba94c 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -742,6 +742,7 @@ radv_image_view_init(struct radv_image_view *iview,
{
RADV_FROM_HANDLE(radv_image, image, pCreateInfo->image);
const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
+ uint32_t blk_w;
bool is_stencil = false;
switch (image->type) {
case VK_IMAGE_TYPE_1D:
@@ -779,6 +780,8 @@ radv_image_view_init(struct radv_image_view *iview,
iview->extent.height = round_up_u32(iview->extent.height *
vk_format_get_blockheight(iview->vk_format),
vk_format_get_blockheight(image->vk_format));
+ assert(image->surface.blk_w %
vk_format_get_blockwidth(image->vk_format) == 0);
+ blk_w = image->surface.blk_w /
vk_format_get_blockwidth(image->vk_format) *
vk_format_get_blockwidth(iview->vk_format);
iview->base_layer = range->baseArrayLayer;
iview->layer_count = radv_get_layerCount(image, range);
iview->base_mip = range->baseMipLevel;
@@ -798,7 +801,7 @@ radv_image_view_init(struct radv_image_view *iview,
si_set_mutable_tex_desc_fields(device, image,
is_stencil ?
&image->surface.stencil_level[range->baseMipLevel] :
&image->surface.level[range->baseMipLevel], range->baseMipLevel,
range->baseMipLevel,
- image->surface.blk_w, is_stencil,
iview->descriptor);
+ blk_w, is_stencil, iview->descriptor);
}
void radv_image_set_optimal_micro_tile_mode(struct radv_device *device,
--
2.11.0
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