On radeonsi hw we have 16 user defined sgprs we can use to feed 32-bit constant values to the shader, we've up until now statically partitioned these, but this can be limiting going forward and also leads to having unused sgprs.
Also radv has currently a limit of 4 descriptor sets, to raise that above that we need to switch to a better allocation scheme (this patchset doesn't do that yet). The first few patches are just moving code around, and moving descriptor emission to the draw flushing code. The main patches are 8, 9, 10. 8 introduces a new interface between radv and ac code to encapsulate the user sgprs for the state setting code to look then up. 9 reworks the descriptor sets we have now, so we only emit them if the layout we are bound with requires them, and 10 makes the push constant binding optional on whether it is used. It should be possible to make the PS sample position and CS grid size, ones optional, however NIR lacks a scanning pass like TGSI, so I'd have to enhance things to know earlier what intrinsics are used. I suppose it might make sense in the future to push this into LLVM for some things. Dave. _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
