From: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/drivers/radeonsi/si_state.c | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 24c7b10..683a157 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -638,44 +638,45 @@ static void si_emit_clip_state(struct si_context *sctx,
struct r600_atom *atom)
radeon_set_context_reg_seq(cs, R_0285BC_PA_CL_UCP_0_X, 6*4);
radeon_emit_array(cs, (uint32_t*)sctx->clip_state.state.ucp, 6*4);
}
#define SIX_BITS 0x3F
static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom)
{
struct radeon_winsys_cs *cs = sctx->b.gfx.cs;
struct tgsi_shader_info *info = si_get_vs_info(sctx);
+ struct si_state_rasterizer *rs = sctx->queued.named.rasterizer;
unsigned window_space =
info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
unsigned clipdist_mask =
info->writes_clipvertex ? SIX_BITS : info->clipdist_writemask;
+ unsigned ucp_mask = clipdist_mask ? 0 : rs->clip_plane_enable &
SIX_BITS;
unsigned total_mask = clipdist_mask | (info->culldist_writemask <<
info->num_written_clipdistance);
radeon_set_context_reg(cs, R_02881C_PA_CL_VS_OUT_CNTL,
S_02881C_USE_VTX_POINT_SIZE(info->writes_psize) |
S_02881C_USE_VTX_EDGE_FLAG(info->writes_edgeflag) |
S_02881C_USE_VTX_RENDER_TARGET_INDX(info->writes_layer) |
S_02881C_USE_VTX_VIEWPORT_INDX(info->writes_viewport_index) |
S_02881C_VS_OUT_CCDIST0_VEC_ENA((total_mask & 0x0F) != 0) |
S_02881C_VS_OUT_CCDIST1_VEC_ENA((total_mask & 0xF0) != 0) |
S_02881C_VS_OUT_MISC_VEC_ENA(info->writes_psize ||
info->writes_edgeflag ||
info->writes_layer ||
info->writes_viewport_index) |
S_02881C_VS_OUT_MISC_SIDE_BUS_ENA(1) |
- (sctx->queued.named.rasterizer->clip_plane_enable &
+ (rs->clip_plane_enable &
clipdist_mask) | (info->culldist_writemask << 8));
radeon_set_context_reg(cs, R_028810_PA_CL_CLIP_CNTL,
- sctx->queued.named.rasterizer->pa_cl_clip_cntl |
- (clipdist_mask ? 0 :
- sctx->queued.named.rasterizer->clip_plane_enable & SIX_BITS) |
+ rs->pa_cl_clip_cntl |
+ ucp_mask |
S_028810_CLIP_DISABLE(window_space));
/* reuse needs to be set off if we write oViewport */
radeon_set_context_reg(cs, R_028AB4_VGT_REUSE_OFF,
S_028AB4_REUSE_OFF(info->writes_viewport_index));
}
/*
* inferred state between framebuffer and rasterizer
*/
--
2.7.4
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/mesa-dev
